Author: David Spickett Date: 2022-01-28T09:10:04Z New Revision: d1c124e6e7006ff5597981f8adcb48b2e26b110d
URL: https://github.com/llvm/llvm-project/commit/d1c124e6e7006ff5597981f8adcb48b2e26b110d DIFF: https://github.com/llvm/llvm-project/commit/d1c124e6e7006ff5597981f8adcb48b2e26b110d.diff LOG: [lldb][ARM/AArch64] Update dissembler to v9.3-a This means sve2 is enabled by default and the v8.8 mops (memcpy and memset acceleration instructions) and HBC (hinted conditional branch) extensions can be disassembled. v9.3-a is equivalent to v8.8-a except that in v9.0-a sve2 was enabled by default so v9.3-a includes that too. MTE remains an optional extension, only enabled for specific CPUs. Reviewed By: omjavaid Differential Revision: https://reviews.llvm.org/D118358 Added: Modified: lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp Removed: ################################################################################ diff --git a/lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp b/lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp index 8c54219f0a140..edc5f005c7ac3 100644 --- a/lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp +++ b/lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp @@ -1097,19 +1097,19 @@ DisassemblerLLVMC::DisassemblerLLVMC(const ArchSpec &arch, thumb_arch_name.erase(0, 3); thumb_arch_name.insert(0, "thumb"); } else { - thumb_arch_name = "thumbv8.7a"; + thumb_arch_name = "thumbv9.3a"; } thumb_arch.GetTriple().setArchName(llvm::StringRef(thumb_arch_name)); } // If no sub architecture specified then use the most recent arm architecture - // so the disassembler will return all instruction. Without it we will see a - // lot of unknow opcode in case the code uses instructions which are not - // available in the oldest arm version (used when no sub architecture is - // specified) + // so the disassembler will return all instructions. Without it we will see a + // lot of unknown opcodes if the code uses instructions which are not + // available in the oldest arm version (which is used when no sub architecture + // is specified). if (triple.getArch() == llvm::Triple::arm && triple.getSubArch() == llvm::Triple::NoSubArch) - triple.setArchName("armv8.7a"); + triple.setArchName("armv9.3a"); std::string features_str; const char *triple_str = triple.getTriple().c_str(); @@ -1179,9 +1179,9 @@ DisassemblerLLVMC::DisassemblerLLVMC(const ArchSpec &arch, } // If any AArch64 variant, enable latest ISA with any optional - // extensions like SVE. + // extensions like MTE. if (triple.isAArch64()) { - features_str += "+v8.7a,+sve2,+mte"; + features_str += "+v9.3a,+mte"; if (triple.getVendor() == llvm::Triple::Apple) cpu = "apple-latest"; _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
