jrtc27 added a comment. I'm concerned by the generality of the command "memory tag". Many different types of memory tagging exist, MTE is but one. CHERI uses memory tagging for something completely different (tracking valid capability, ie pointer provenance), and its tags make sense to read (though are a property of the stored data, not the memory allocation), but not explicitly write (only implicitly by writing a capability to the associated location, which will include the non-addressable tag bit), as that is architecturally forbidden in order to ensure that the hardware-enforced tags can never be corrupted by software. Moreover, in future, CHERI and MTE will be composed (there is ongoing experimental work to investigate doing so on CHERI-RISC-V, and if Arm's experimental Morello prototype is adopted in a future version of the Arm architecture it will also have to compose with MTE). See also the core dump format for MTE tags, which specifies the _type_ of tag, specifically to accommodate other uses of tagged memory.
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