omjavaid updated this revision to Diff 287333.
omjavaid added a comment.
Updated after changes to TestSVERegister.py for detecting SVE support using
/proc/cpuinfo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D82866/new/
https://reviews.llvm.org/D82866
Files:
lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/Makefile
lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/TestSVEThreadedDynamic.py
lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/main.c
Index: lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/main.c
===================================================================
--- /dev/null
+++ lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/main.c
@@ -0,0 +1,57 @@
+#include <pthread.h>
+#include <sys/prctl.h>
+
+void *thread_func(void *x_void_ptr) {
+ void *return_ptr = NULL;
+ if (*((int *)x_void_ptr) == 0) {
+ prctl(PR_SVE_SET_VL, 8 * 4);
+ asm volatile("ptrue p0.s\n\t");
+ asm volatile("fcpy z30.s, p0/m, #1.00000000\n\t");
+ asm volatile("fcpy z31.s, p0/m, #5.00000000\n\t");
+ return_ptr = (void *)x_void_ptr; // Thread X breakpoint 1
+ asm volatile("ptrue p0.s\n\t");
+ asm volatile("fcpy z0.s, p0/m, #1.00000000\n\t");
+ asm volatile("fcpy z1.s, p0/m, #5.00000000\n\t");
+ return return_ptr; // Thread X breakpoint 2
+ }
+
+ if (*((int *)x_void_ptr) == 1) {
+ prctl(PR_SVE_SET_VL, 8 * 2);
+ asm volatile("ptrue p0.s\n\t");
+ asm volatile("fcpy z30.s, p0/m, #5.00000000\n\t");
+ asm volatile("fcpy z31.s, p0/m, #1.00000000\n\t");
+ return_ptr = x_void_ptr; // Thread Y breakpoint 1
+ asm volatile("ptrue p0.s\n\t");
+ asm volatile("fcpy z1.s, p0/m, #1.00000000\n\t");
+ asm volatile("fcpy z0.s, p0/m, #5.00000000\n\t");
+ return return_ptr; // Thread Y breakpoint 2
+ }
+ return return_ptr;
+}
+
+int main() {
+ prctl(PR_SVE_SET_VL, 8);
+
+ /* this variable is our reference to the second thread */
+ pthread_t x_thread, y_thread;
+
+ int x = 0, y = 1;
+
+ /* create a second thread which executes with argument x */
+ if (pthread_create(&x_thread, NULL, thread_func, &x)) // Break in main thread
+ return 1;
+
+ /* create a second thread which executes with argument y */
+ if (pthread_create(&y_thread, NULL, thread_func, &y))
+ return 1;
+
+ /* wait for the first thread to finish */
+ if (pthread_join(x_thread, NULL))
+ return 2;
+
+ /* wait for the second thread to finish */
+ if (pthread_join(y_thread, NULL))
+ return 2;
+
+ return 0;
+}
Index: lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/TestSVEThreadedDynamic.py
===================================================================
--- /dev/null
+++ lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/TestSVEThreadedDynamic.py
@@ -0,0 +1,165 @@
+"""
+Test the AArch64 SVE registers dynamic resize with multiple threads.
+"""
+
+import lldb
+from lldbsuite.test.decorators import *
+from lldbsuite.test.lldbtest import *
+from lldbsuite.test import lldbutil
+
+
+class RegisterCommandsTestCase(TestBase):
+
+ def targetHasSVE(self):
+ triple = self.dbg.GetSelectedPlatform().GetTriple()
+
+ # TODO other platforms, please implement this function
+ if not re.match(".*-.*-linux", triple):
+ return False
+
+ # Need to do something different for non-Linux/Android targets
+ cpuinfo_path = self.getBuildArtifact("cpuinfo")
+ if configuration.lldb_platform_name:
+ self.runCmd('platform get-file "/proc/cpuinfo" ' + cpuinfo_path)
+ else:
+ cpuinfo_path = "/proc/cpuinfo"
+
+ try:
+ f = open(cpuinfo_path, 'r')
+ cpuinfo = f.read()
+ f.close()
+ except:
+ return False
+
+ return " sve " in cpuinfo
+
+ def check_sve_register_size_and_offset(self, set, name, expected_size,
+ expected_offset):
+ reg_value = set.GetChildMemberWithName(name)
+
+ self.assertTrue(reg_value.IsValid(),
+ 'Verify we have a register named "%s"' % (name))
+ self.assertEqual(reg_value.GetByteSize(), expected_size,
+ 'Verify "%s" size == %i' % (name, expected_size))
+ self.assertEqual(reg_value.GetByteOffset(), expected_offset,
+ 'Verify "%s" == %i' % (name, expected_offset))
+
+ def check_sve_registers_config(self, set, vg_test_value):
+ vg_reg_value = set.GetChildMemberWithName("vg").GetValueAsUnsigned()
+ offset = set.GetChildMemberWithName("z0").GetByteOffset()
+
+ z_reg_size = vg_reg_value * 8
+ p_reg_size = z_reg_size / 8
+
+ for i in range(32):
+ self.check_sve_register_size_and_offset(
+ set, 's%i' % (i), 4, offset)
+ self.check_sve_register_size_and_offset(
+ set, 'd%i' % (i), 8, offset)
+ self.check_sve_register_size_and_offset(
+ set, 'v%i' % (i), 16, offset)
+ self.check_sve_register_size_and_offset(
+ set, 'z%i' % (i), z_reg_size, offset)
+ offset = offset + z_reg_size
+
+ for i in range(16):
+ self.check_sve_register_size_and_offset(
+ set, 'p%i' % (i), p_reg_size, offset)
+ offset = offset + p_reg_size
+
+ self.check_sve_register_size_and_offset(set, 'ffr', p_reg_size, offset)
+
+ mydir = TestBase.compute_mydir(__file__)
+
+ @no_debug_info_test
+ @skipIf(archs=no_match(["aarch64"]))
+ @skipIf(oslist=no_match(['linux']))
+ def test_sve_registers_dynamic_config(self):
+ """Test AArch64 SVE registers multi-threaded dynamic resize. """
+
+ self.build()
+ exe = self.getBuildArtifact("a.out")
+ self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
+
+ if not self.targetHasSVE():
+ self.skipTest('SVE registers must be supported.')
+
+ main_thread_stop_line = line_number(
+ "main.c", "// Break in main thread")
+ lldbutil.run_break_set_by_file_and_line(
+ self, "main.c", main_thread_stop_line)
+
+ thX_break_line1 = line_number("main.c", "// Thread X breakpoint 1")
+ lldbutil.run_break_set_by_file_and_line(
+ self, "main.c", thX_break_line1)
+
+ thX_break_line2 = line_number("main.c", "// Thread X breakpoint 2")
+ lldbutil.run_break_set_by_file_and_line(
+ self, "main.c", thX_break_line2)
+
+ thY_break_line1 = line_number("main.c", "// Thread Y breakpoint 1")
+ lldbutil.run_break_set_by_file_and_line(
+ self, "main.c", thY_break_line1)
+
+ thY_break_line2 = line_number("main.c", "// Thread Y breakpoint 2")
+ lldbutil.run_break_set_by_file_and_line(
+ self, "main.c", thY_break_line2)
+
+ self.runCmd("run", RUN_SUCCEEDED)
+
+ process = self.dbg.GetSelectedTarget().GetProcess()
+
+ thread1 = process.GetThreadAtIndex(0)
+
+ self.expect("thread info 1", STOPPED_DUE_TO_BREAKPOINT,
+ substrs=["stop reason = breakpoint"])
+
+ for registerSet in thread1.GetFrameAtIndex(0).GetRegisters():
+ if 'Scalable Vector Extension Registers' in registerSet.GetName():
+ self.check_sve_registers_config(registerSet, 8)
+
+ self.runCmd("process continue", RUN_SUCCEEDED)
+
+ for idx in range(1, process.GetNumThreads()):
+ thread = process.GetThreadAtIndex(idx)
+ if thread.GetStopReason() != lldb.eStopReasonBreakpoint:
+ self.runCmd("thread continue %d" % (idx + 1))
+ self.assertEqual(thread.GetStopReason(),
+ lldb.eStopReasonBreakpoint)
+
+ stopped_at_line_number = thread.GetFrameAtIndex(
+ 0).GetLineEntry().GetLine()
+
+ sve_registers = thread.GetFrameAtIndex(
+ 0).GetRegisters().GetValueAtIndex(2)
+
+ if stopped_at_line_number == thX_break_line1:
+ self.check_sve_registers_config(sve_registers, 2)
+ self.runCmd("thread select %d" % (idx + 1))
+ self.runCmd('register write vg 4')
+
+ elif stopped_at_line_number == thY_break_line1:
+ self.check_sve_registers_config(sve_registers, 4)
+ self.runCmd("thread select %d" % (idx + 1))
+ self.runCmd('register write vg 2')
+
+ self.runCmd("process continue", RUN_SUCCEEDED)
+
+ for idx in range(1, process.GetNumThreads()):
+ thread = process.GetThreadAtIndex(idx)
+ if thread.GetStopReason() != lldb.eStopReasonBreakpoint:
+ self.runCmd("thread continue %d" % (idx + 1))
+ self.assertEqual(thread.GetStopReason(),
+ lldb.eStopReasonBreakpoint)
+
+ stopped_at_line_number = thread.GetFrameAtIndex(
+ 0).GetLineEntry().GetLine()
+
+ sve_registers = thread.GetFrameAtIndex(
+ 0).GetRegisters().GetValueAtIndex(2)
+
+ if stopped_at_line_number == thX_break_line2:
+ self.check_sve_registers_config(sve_registers, 4)
+
+ elif stopped_at_line_number == thY_break_line2:
+ self.check_sve_registers_config(sve_registers, 2)
Index: lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/Makefile
===================================================================
--- /dev/null
+++ lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/Makefile
@@ -0,0 +1,5 @@
+C_SOURCES := main.c
+
+CFLAGS_EXTRAS := -march=armv8-a+sve -lpthread
+
+include Makefile.rules
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