> On Nov 15, 2017, at 1:38 AM, Pavel Labath <lab...@google.com> wrote:
>
> On 15 November 2017 at 03:41, Jason Molenda via lldb-commits
> <lldb-commits@lists.llvm.org> wrote:
>> Author: jmolenda
>> Date: Tue Nov 14 19:41:47 2017
>> New Revision: 318262
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=318262&view=rev
>> Log:
>> Roll back r318260 because it is causing the windows bot to
>> break. The alignas(__uint128_t) is not recognized with MSVC
>> it looks like. Zachary, is there a similar type on windows?
>> I suppose I can go with alignas(16) here but I'd prefer to
>> specify the type alignment that I want & let the ABI dictate
>> how much padding is required.
>
>
> Are you sure about that? If I understand correctly, this register
> context is used on the host, so, if you're cross-debugging, you'll
> have the *host* ABI dictating the layout of the mac arm64 target
> registers, which sounds like a bad idea.
Thanks for the comment. The darwin kernel defines this structure like
struct __darwin_arm_neon_state64
{
__uint128_t __v[32];
__uint32_t __fpsr;
__uint32_t __fpcr;
};
Someone was experimenting with saving the fpu register context in a corefile
and noticed that lldb's definition of this structure,
struct VReg {
uint8_t bytes[16];
};
// mirrors <mach/arm/thread_status.h> arm_neon_state64_t
struct FPU {
struct VReg v[32];
uint32_t fpsr;
uint32_t fpcr;
};
doesn't require 16-byte alignment so it has a different size. The kernel
structure with __uint128_t will have 8 bytes of padding at the end (total size
528), lldb's definition doesn't require aligning to a 16-byte boundary so it is
only 520 bytes long.
We use this FPU definition from RegisterContextDarwin_arm64.h in
ObjectFileMachO.cpp when we're reading saved register contexts from a core
file. The core file register context will have 528 bytes which won't match the
size of FPU from RegisterContextDarwin_arm64.h so it'll error out.
I'll go with Zachary's suggestion of using the llvm idiom to force 16-byte
alignment, I think that's a good way to solve this.
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