https://github.com/mchoo7 updated https://github.com/llvm/llvm-project/pull/180670
>From c294e465fc028e551e099595b3c7b89bed2e27ba Mon Sep 17 00:00:00 2001 From: Minsoo Choo <[email protected]> Date: Fri, 6 Feb 2026 10:02:48 -0500 Subject: [PATCH 1/6] [lldb][Process/FreeBSDKernel] Add riscv64 support Signed-off-by: Minsoo Choo <[email protected]> --- lldb/docs/index.rst | 2 +- .../Process/FreeBSDKernel/CMakeLists.txt | 1 + .../RegisterContextFreeBSDKernel_riscv64.cpp | 110 ++++++++++++++++++ .../RegisterContextFreeBSDKernel_riscv64.h | 49 ++++++++ .../FreeBSDKernel/ThreadFreeBSDKernel.cpp | 8 ++ llvm/docs/ReleaseNotes.md | 1 + 6 files changed, 170 insertions(+), 1 deletion(-) create mode 100644 lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp create mode 100644 lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h diff --git a/lldb/docs/index.rst b/lldb/docs/index.rst index 10683c7593b01..d605d2649d94f 100644 --- a/lldb/docs/index.rst +++ b/lldb/docs/index.rst @@ -74,7 +74,7 @@ are welcome: * iOS, tvOS, and watchOS device debugging on ARM and AArch64 * Linux user-space debugging for i386, x86_64, ARM, AArch64, PPC64le, s390x * FreeBSD user-space debugging for i386, x86_64, ARM, AArch64, PPC -* FreeBSD kernel debugging for i386, x86_64, AArch64 +* FreeBSD kernel debugging for i386, x86_64, AArch64, RISCV64 * NetBSD user-space debugging for i386 and x86_64 * Windows user-space debugging for i386, x86_64, ARM and AArch64 (*) diff --git a/lldb/source/Plugins/Process/FreeBSDKernel/CMakeLists.txt b/lldb/source/Plugins/Process/FreeBSDKernel/CMakeLists.txt index c35b4def24e25..d8a42c599a77e 100644 --- a/lldb/source/Plugins/Process/FreeBSDKernel/CMakeLists.txt +++ b/lldb/source/Plugins/Process/FreeBSDKernel/CMakeLists.txt @@ -15,6 +15,7 @@ add_lldb_library(lldbPluginProcessFreeBSDKernel PLUGIN ProcessFreeBSDKernel.cpp RegisterContextFreeBSDKernel_arm64.cpp RegisterContextFreeBSDKernel_i386.cpp + RegisterContextFreeBSDKernel_riscv64.cpp RegisterContextFreeBSDKernel_x86_64.cpp ThreadFreeBSDKernel.cpp diff --git a/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp b/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp new file mode 100644 index 0000000000000..d93f3f3b0e807 --- /dev/null +++ b/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp @@ -0,0 +1,110 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +/// +/// \file +/// This file contains the definition of the +/// RegisterContextFreeBSDKernel_riscv64 class, which is used for reading +/// registers from PCB on ppc64le kernel dump. +/// +//===----------------------------------------------------------------------===// + +#include "RegisterContextFreeBSDKernel_riscv64.h" + +#include "lldb/Target/Process.h" +#include "lldb/Target/Thread.h" +#include "lldb/Utility/RegisterValue.h" +#include "llvm/Support/Endian.h" + +using namespace lldb; +using namespace lldb_private; + +RegisterContextFreeBSDKernel_riscv64::RegisterContextFreeBSDKernel_riscv64( + Thread &thread, std::unique_ptr<RegisterInfoPOSIX_riscv64> register_info_up, + lldb::addr_t pcb_addr) + : RegisterContextPOSIX_riscv64(thread, std::move(register_info_up)), + m_pcb_addr(pcb_addr) {} + +bool RegisterContextFreeBSDKernel_riscv64::ReadGPR() { return true; } + +bool RegisterContextFreeBSDKernel_riscv64::ReadFPR() { return true; } + +bool RegisterContextFreeBSDKernel_riscv64::WriteGPR() { + assert(0); + return false; +} + +bool RegisterContextFreeBSDKernel_riscv64::WriteFPR() { + assert(0); + return false; +} + +bool RegisterContextFreeBSDKernel_riscv64::ReadRegister( + const RegisterInfo *reg_info, RegisterValue &value) { + if (m_pcb_addr == LLDB_INVALID_ADDRESS) + return false; + + // https://cgit.freebsd.org/src/tree/sys/riscv/include/pcb.h + struct { + llvm::support::ulittle64_t ra; + llvm::support::ulittle64_t sp; + llvm::support::ulittle64_t gp; + llvm::support::ulittle64_t tp; + llvm::support::ulittle64_t s[12]; + } pcb; + + Status error; + size_t rd = + m_thread.GetProcess()->ReadMemory(m_pcb_addr, &pcb, sizeof(pcb), error); + if (rd != sizeof(pcb)) + return false; + + uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB]; + switch (reg) { + case gpr_pc_riscv: + // Supply the RA as PC as well to simulate the PC as if the thread had just + // returned. + case gpr_ra_riscv: + value = pcb.ra; + break; + case gpr_sp_riscv: + value = pcb.sp; + break; + case gpr_gp_riscv: + value = pcb.gp; + break; + case gpr_tp_riscv: + value = pcb.tp; + break; + case gpr_fp_riscv: + value = pcb.s[0]; + break; + case gpr_s1_riscv: + value = pcb.s[1]; + break; + case gpr_s2_riscv: + case gpr_s3_riscv: + case gpr_s4_riscv: + case gpr_s5_riscv: + case gpr_s6_riscv: + case gpr_s7_riscv: + case gpr_s8_riscv: + case gpr_s9_riscv: + case gpr_s10_riscv: + case gpr_s11_riscv: + value = pcb.s[reg - gpr_s2_riscv]; + break; + default: + return false; + } + return true; +} + +bool RegisterContextFreeBSDKernel_riscv64::WriteRegister( + const RegisterInfo *reg_info, const RegisterValue &value) { + return false; +} diff --git a/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h b/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h new file mode 100644 index 0000000000000..789d203d8c158 --- /dev/null +++ b/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h @@ -0,0 +1,49 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +/// +/// \file +/// This file contains the declaration of the +/// RegisterContextFreeBSDKernel_riscv64 class, which is used for reading +/// registers from PCB on ppc64le kernel dump. +/// +//===----------------------------------------------------------------------===// + +#ifndef LLDB_SOURCE_PLUGINS_PROCESS_FREEBSDKERNEL_REGISTERCONTEXTFREEBSDKERNEL_RISCV64_H +#define LLDB_SOURCE_PLUGINS_PROCESS_FREEBSDKERNEL_REGISTERCONTEXTFREEBSDKERNEL_RISCV64_H + +#include "Plugins/Process/Utility/RegisterContextPOSIX_riscv64.h" +#include "Plugins/Process/elf-core/RegisterUtilities.h" + +class RegisterContextFreeBSDKernel_riscv64 + : public RegisterContextPOSIX_riscv64 { +public: + RegisterContextFreeBSDKernel_riscv64( + lldb_private::Thread &thread, + std::unique_ptr<RegisterInfoPOSIX_riscv64> register_info_up, + lldb::addr_t pcb_addr); + + bool ReadRegister(const lldb_private::RegisterInfo *reg_info, + lldb_private::RegisterValue &value) override; + + bool WriteRegister(const lldb_private::RegisterInfo *reg_info, + const lldb_private::RegisterValue &value) override; + +protected: + bool ReadGPR() override; + + bool ReadFPR() override; + + bool WriteGPR() override; + + bool WriteFPR() override; + +private: + lldb::addr_t m_pcb_addr; +}; + +#endif // LLDB_SOURCE_PLUGINS_PROCESS_FREEBSDKERNEL_REGISTERCONTEXTFREEBSDKERNEL_RISCV64_H diff --git a/lldb/source/Plugins/Process/FreeBSDKernel/ThreadFreeBSDKernel.cpp b/lldb/source/Plugins/Process/FreeBSDKernel/ThreadFreeBSDKernel.cpp index dd1ed52719749..28de9bed05519 100644 --- a/lldb/source/Plugins/Process/FreeBSDKernel/ThreadFreeBSDKernel.cpp +++ b/lldb/source/Plugins/Process/FreeBSDKernel/ThreadFreeBSDKernel.cpp @@ -15,9 +15,11 @@ #include "Plugins/Process/Utility/RegisterContextFreeBSD_i386.h" #include "Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h" #include "Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h" +#include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h" #include "ProcessFreeBSDKernel.h" #include "RegisterContextFreeBSDKernel_arm64.h" #include "RegisterContextFreeBSDKernel_i386.h" +#include "RegisterContextFreeBSDKernel_riscv64.h" #include "RegisterContextFreeBSDKernel_x86_64.h" using namespace lldb; @@ -62,6 +64,12 @@ ThreadFreeBSDKernel::CreateRegisterContextForFrame(StackFrame *frame) { *this, std::make_unique<RegisterInfoPOSIX_arm64>(arch, 0), m_pcb_addr); break; + case llvm::Triple::riscv64: + m_thread_reg_ctx_sp = + std::make_shared<RegisterContextFreeBSDKernel_riscv64>( + *this, std::make_unique<RegisterInfoPOSIX_riscv64>(arch, 0), + m_pcb_addr); + break; case llvm::Triple::x86: m_thread_reg_ctx_sp = std::make_shared<RegisterContextFreeBSDKernel_i386>( *this, new RegisterContextFreeBSD_i386(arch), m_pcb_addr); diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md index 30e74acf973ed..d37af4f25b503 100644 --- a/llvm/docs/ReleaseNotes.md +++ b/llvm/docs/ReleaseNotes.md @@ -182,6 +182,7 @@ Changes to LLDB * Support for FreeBSD on MIPS64 has been removed. * The minimum assumed version of FreeBSD is now 14. The effect of which is that watchpoints are assumed to be supported. +* Kernel debugging support for RISCV64 on FreeBSD has been added. Changes to BOLT --------------- >From e6b814d985998c176f8d7bd0bcfbdece2ce57fe6 Mon Sep 17 00:00:00 2001 From: Minsoo Choo <[email protected]> Date: Tue, 10 Feb 2026 12:55:10 -0500 Subject: [PATCH 2/6] fixup! [lldb][Process/FreeBSDKernel] Add riscv64 support Signed-off-by: Minsoo Choo <[email protected]> --- .../FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp | 2 +- .../FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp b/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp index d93f3f3b0e807..5d6cd56860066 100644 --- a/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp +++ b/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp @@ -9,7 +9,7 @@ /// \file /// This file contains the definition of the /// RegisterContextFreeBSDKernel_riscv64 class, which is used for reading -/// registers from PCB on ppc64le kernel dump. +/// registers from PCB on riscv64 kernel dump. /// //===----------------------------------------------------------------------===// diff --git a/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h b/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h index 789d203d8c158..277fb5bfed96f 100644 --- a/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h +++ b/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h @@ -9,7 +9,7 @@ /// \file /// This file contains the declaration of the /// RegisterContextFreeBSDKernel_riscv64 class, which is used for reading -/// registers from PCB on ppc64le kernel dump. +/// registers from PCB on riscv64 kernel dump. /// //===----------------------------------------------------------------------===// >From 92e1c000a337d4c66436ef8d3ac96e2877901695 Mon Sep 17 00:00:00 2001 From: Minsoo Choo <[email protected]> Date: Wed, 11 Feb 2026 14:08:37 -0500 Subject: [PATCH 3/6] fixup! [lldb][Process/FreeBSDKernel] Add riscv64 support Signed-off-by: Minsoo Choo <[email protected]> --- .../FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp | 6 +++--- .../FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp b/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp index 5d6cd56860066..ad4c4500ce520 100644 --- a/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp +++ b/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.cpp @@ -9,7 +9,7 @@ /// \file /// This file contains the definition of the /// RegisterContextFreeBSDKernel_riscv64 class, which is used for reading -/// registers from PCB on riscv64 kernel dump. +/// registers from PCB in riscv64 kernel dump. /// //===----------------------------------------------------------------------===// @@ -66,9 +66,9 @@ bool RegisterContextFreeBSDKernel_riscv64::ReadRegister( uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB]; switch (reg) { case gpr_pc_riscv: - // Supply the RA as PC as well to simulate the PC as if the thread had just - // returned. case gpr_ra_riscv: + // Supply the RA as PC as well to simulate the PC as if the thread had just + // returned. value = pcb.ra; break; case gpr_sp_riscv: diff --git a/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h b/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h index 277fb5bfed96f..243fcd1e8e5cf 100644 --- a/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h +++ b/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_riscv64.h @@ -9,7 +9,7 @@ /// \file /// This file contains the declaration of the /// RegisterContextFreeBSDKernel_riscv64 class, which is used for reading -/// registers from PCB on riscv64 kernel dump. +/// registers from PCB in riscv64 kernel dump. /// //===----------------------------------------------------------------------===// >From 229635f947b47883bd08d435d5ba9c676715b0d8 Mon Sep 17 00:00:00 2001 From: Minsoo Choo <[email protected]> Date: Wed, 25 Feb 2026 11:42:24 -0500 Subject: [PATCH 4/6] fixup! [lldb][Process/FreeBSDKernel] Add riscv64 support Signed-off-by: Minsoo Choo <[email protected]> --- llvm/docs/ReleaseNotes.md | 1 - 1 file changed, 1 deletion(-) diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md index ff51c7147ed49..b297486270c93 100644 --- a/llvm/docs/ReleaseNotes.md +++ b/llvm/docs/ReleaseNotes.md @@ -211,7 +211,6 @@ Changes to LLDB * Support for MIPS64 has been removed. * The minimum assumed FreeBSD version is now 14. The effect of which is that watchpoints are assumed to be supported. -* Kernel debugging support for RISCV64 on FreeBSD has been added. #### Kernel Debugging >From 44308f11e4539f15033ce05d7ae095fdd800e026 Mon Sep 17 00:00:00 2001 From: Minsoo Choo <[email protected]> Date: Sat, 28 Feb 2026 11:55:45 -0500 Subject: [PATCH 5/6] fixup! [lldb][Process/FreeBSDKernelCore] Add riscv64 support Signed-off-by: Minsoo Choo <[email protected]> --- .../Process/FreeBSD-Kernel-Core/ThreadFreeBSDKernelCore.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ThreadFreeBSDKernelCore.cpp b/lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ThreadFreeBSDKernelCore.cpp index 91940c339bfb6..b98ed1208f5ef 100644 --- a/lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ThreadFreeBSDKernelCore.cpp +++ b/lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ThreadFreeBSDKernelCore.cpp @@ -84,6 +84,7 @@ ThreadFreeBSDKernelCore::CreateRegisterContextForFrame(StackFrame *frame) { std::make_shared<RegisterContextFreeBSDKernelCore_riscv64>( *this, std::make_unique<RegisterInfoPOSIX_riscv64>(arch, 0), m_pcb_addr); + break; case llvm::Triple::x86: m_thread_reg_ctx_sp = std::make_shared<RegisterContextFreeBSDKernelCore_i386>( >From d0a0492e4424b3dd3546d1886d934af51ce87a0f Mon Sep 17 00:00:00 2001 From: Minsoo Choo <[email protected]> Date: Sat, 28 Feb 2026 15:04:01 -0500 Subject: [PATCH 6/6] fixup! [lldb][Process/FreeBSDKernelCore] Add riscv64 support Signed-off-by: Minsoo Choo <[email protected]> --- .../RegisterContextFreeBSDKernelCore_riscv64.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lldb/source/Plugins/Process/FreeBSD-Kernel-Core/RegisterContextFreeBSDKernelCore_riscv64.cpp b/lldb/source/Plugins/Process/FreeBSD-Kernel-Core/RegisterContextFreeBSDKernelCore_riscv64.cpp index 322f6de0ae4c3..b705c6d6d43bd 100644 --- a/lldb/source/Plugins/Process/FreeBSD-Kernel-Core/RegisterContextFreeBSDKernelCore_riscv64.cpp +++ b/lldb/source/Plugins/Process/FreeBSD-Kernel-Core/RegisterContextFreeBSDKernelCore_riscv64.cpp @@ -91,7 +91,7 @@ bool RegisterContextFreeBSDKernelCore_riscv64::ReadRegister( case gpr_s9_riscv: case gpr_s10_riscv: case gpr_s11_riscv: - value = pcb.s[reg - gpr_s2_riscv]; + value = pcb.s[reg - gpr_s2_riscv + 2]; break; default: return false; _______________________________________________ lldb-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
