================
@@ -76,17 +77,26 @@ class NativeRegisterContextDBReg
// On AArch64 and Loongarch the hardware breakpoint length size is 4, and the
// target address must 4-byte alignment.
- bool ValidateBreakpoint(size_t size, lldb::addr_t addr) {
+ virtual bool ValidateBreakpoint(size_t size, lldb::addr_t addr) {
return (size == 4) && !(addr & 0x3);
}
+
struct WatchpointDetails {
size_t size;
lldb::addr_t addr;
};
virtual std::optional<WatchpointDetails>
AdjustWatchpoint(const WatchpointDetails &details) = 0;
+
+ using BreakpointDetails = WatchpointDetails;
+ virtual std::optional<BreakpointDetails>
+ AdjustBreakpoint(const BreakpointDetails &details) {
----------------
b10902118 wrote:
Is this used?
https://github.com/llvm/llvm-project/pull/152284
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