https://github.com/medismailben created
https://github.com/llvm/llvm-project/pull/145099
This patch adds support to the haswell sub-architecture (x86_64h) to scripted
processes.
rdar://147208252
>From bf21c2e9c59939956230d3093d5705e3e8fde12e Mon Sep 17 00:00:00 2001
From: Med Ismail Bennani <ism...@bennani.ma>
Date: Fri, 20 Jun 2025 13:03:10 -0700
Subject: [PATCH] [lldb] Add support for x86_64h to scripted process (NFC)
This patch adds support to the haswell sub-architecture (x86_64h) to
scripted processes.
rdar://147208252
Signed-off-by: Med Ismail Bennani <ism...@bennani.ma>
---
lldb/examples/python/templates/scripted_process.py | 2 +-
.../Shell/ScriptInterpreter/Python/Crashlog/Inputs/a.out.ips | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/lldb/examples/python/templates/scripted_process.py
b/lldb/examples/python/templates/scripted_process.py
index c7d5b28b52c00..b6360b8519077 100644
--- a/lldb/examples/python/templates/scripted_process.py
+++ b/lldb/examples/python/templates/scripted_process.py
@@ -352,7 +352,7 @@ def get_stackframes(self):
def get_register_info(self):
if self.register_info is None:
self.register_info = dict()
- if self.originating_process.arch == "x86_64":
+ if "x86_64" in self.originating_process.arch:
self.register_info["sets"] = ["General Purpose Registers"]
self.register_info["registers"] = INTEL64_GPR
elif (
diff --git a/lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/a.out.ips
b/lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/a.out.ips
index cc2f16c016147..a11074f13e90a 100644
--- a/lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/a.out.ips
+++ b/lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/a.out.ips
@@ -169,7 +169,7 @@
},
{
"source" : "P",
- "arch" : "x86_64",
+ "arch" : "x86_64h",
"base" : 140733734899712,
"size" : 245760,
"uuid" : "c5caf30b-0617-3b07-88c7-6319cd06f30a",
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