Author: Maryam Moghadas Date: 2025-06-20T13:03:14-04:00 New Revision: 65cb3bcf327da8f9740e56897bc9954364e59eb6
URL: https://github.com/llvm/llvm-project/commit/65cb3bcf327da8f9740e56897bc9954364e59eb6 DIFF: https://github.com/llvm/llvm-project/commit/65cb3bcf327da8f9740e56897bc9954364e59eb6.diff LOG: [Clang][PowerPC] Add __dmr1024 type and DMF integer calculation builtins (#142480) Define the __dmr1024 type used to manipulate the new DMR registers introduced by the Dense Math Facility (DMF) on PowerPC, and add six Clang builtins that correspond to the integer outer-product accumulate to ACC PowerPC instructions: * __builtin_mma_dmxvi8gerx4 * __builtin_mma_pmdmxvi8gerx4 * __builtin_mma_dmxvi8gerx4pp * __builtin_mma_pmdmxvi8gerx4pp * __builtin_mma_dmxvi8gerx4spp * __builtin_mma_pmdmxvi8gerx4spp. Added: clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c clang/test/CodeGen/PowerPC/ppc-dmf-paired-vec-memops-builtin-err.c clang/test/CodeGen/PowerPC/ppc-dmf-types.c clang/test/CodeGen/PowerPC/ppc-future-mma-builtin-err.c clang/test/Sema/ppc-dmf-types.c Modified: clang/include/clang/Basic/BuiltinsPPC.def clang/include/clang/Basic/PPCTypes.def clang/lib/AST/ASTContext.cpp clang/test/AST/ast-dump-ppc-types.c clang/test/CodeGenCXX/ppc-mangle-mma-types.cpp lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp Removed: ################################################################################ diff --git a/clang/include/clang/Basic/BuiltinsPPC.def b/clang/include/clang/Basic/BuiltinsPPC.def index bb7d54bbb793e..099500754a0e0 100644 --- a/clang/include/clang/Basic/BuiltinsPPC.def +++ b/clang/include/clang/Basic/BuiltinsPPC.def @@ -1134,6 +1134,18 @@ UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2np, "vW512*VVi15i15i3", true, "mma,paired-vector-memops") UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2nn, "vW512*VVi15i15i3", true, "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_dmxvi8gerx4, "vW1024*W256V", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmdmxvi8gerx4, "vW1024*W256Vi255i15i15", false, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_dmxvi8gerx4pp, "vW1024*W256V", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmdmxvi8gerx4pp, "vW1024*W256Vi255i15i15", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_dmxvi8gerx4spp, "vW1024*W256V", true, + "mma,paired-vector-memops") +UNALIASED_CUSTOM_BUILTIN(mma_pmdmxvi8gerx4spp, "vW1024*W256Vi255i15i15", true, + "mma,paired-vector-memops") // FIXME: Obviously incomplete. diff --git a/clang/include/clang/Basic/PPCTypes.def b/clang/include/clang/Basic/PPCTypes.def index 9e2cb2aedc9fc..fc4155ca98b2d 100644 --- a/clang/include/clang/Basic/PPCTypes.def +++ b/clang/include/clang/Basic/PPCTypes.def @@ -30,6 +30,7 @@ #endif +PPC_VECTOR_MMA_TYPE(__dmr1024, DMR1024, 1024) PPC_VECTOR_MMA_TYPE(__vector_quad, VectorQuad, 512) PPC_VECTOR_VSX_TYPE(__vector_pair, VectorPair, 256) diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp index 74be2871f270c..02d6570d0ea0f 100644 --- a/clang/lib/AST/ASTContext.cpp +++ b/clang/lib/AST/ASTContext.cpp @@ -3522,6 +3522,7 @@ static void encodeTypeForFunctionPointerAuth(const ASTContext &Ctx, case BuiltinType::BFloat16: case BuiltinType::VectorQuad: case BuiltinType::VectorPair: + case BuiltinType::DMR1024: OS << "?"; return; diff --git a/clang/test/AST/ast-dump-ppc-types.c b/clang/test/AST/ast-dump-ppc-types.c index 26ae5441f20d7..1c860c268e0ec 100644 --- a/clang/test/AST/ast-dump-ppc-types.c +++ b/clang/test/AST/ast-dump-ppc-types.c @@ -1,9 +1,11 @@ +// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu future \ +// RUN: -ast-dump %s | FileCheck %s // RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr10 \ -// RUN: -ast-dump -ast-dump-filter __vector %s | FileCheck %s +// RUN: -ast-dump %s | FileCheck %s // RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr9 \ -// RUN: -ast-dump -ast-dump-filter __vector %s | FileCheck %s +// RUN: -ast-dump %s | FileCheck %s // RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr8 \ -// RUN: -ast-dump -ast-dump-filter __vector %s | FileCheck %s +// RUN: -ast-dump %s | FileCheck %s // RUN: %clang_cc1 -triple x86_64-unknown-unknown -ast-dump %s | FileCheck %s \ // RUN: --check-prefix=CHECK-X86_64 // RUN: %clang_cc1 -triple arm-unknown-unknown -ast-dump %s | FileCheck %s \ @@ -15,16 +17,21 @@ // are correctly defined. We also added checks on a couple of other targets to // ensure the types are target-dependent. +// CHECK: TypedefDecl {{.*}} implicit __dmr1024 '__dmr1024' +// CHECK: `-BuiltinType {{.*}} '__dmr1024' // CHECK: TypedefDecl {{.*}} implicit __vector_quad '__vector_quad' // CHECK-NEXT: -BuiltinType {{.*}} '__vector_quad' // CHECK: TypedefDecl {{.*}} implicit __vector_pair '__vector_pair' // CHECK-NEXT: -BuiltinType {{.*}} '__vector_pair' +// CHECK-X86_64-NOT: __dmr1024 // CHECK-X86_64-NOT: __vector_quad // CHECK-X86_64-NOT: __vector_pair +// CHECK-ARM-NOT: __dmr1024 // CHECK-ARM-NOT: __vector_quad // CHECK-ARM-NOT: __vector_pair +// CHECK-RISCV64-NOT: __dmr1024 // CHECK-RISCV64-NOT: __vector_quad // CHECK-RISCV64-NOT: __vector_pair diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c b/clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c new file mode 100644 index 0000000000000..41f13155847ba --- /dev/null +++ b/clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c @@ -0,0 +1,94 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py +// RUN: %clang_cc1 -O3 -triple powerpc64le-unknown-unknown -target-cpu future \ +// RUN: -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -O3 -triple powerpc64-ibm-aix -target-cpu future \ +// RUN: -emit-llvm %s -o - | FileCheck %s + + +// CHECK-LABEL: @test_dmxvi8gerx4( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = load <256 x i1>, ptr [[VPP:%.*]], align 32, !tbaa [[TBAA2:![0-9]+]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4(<256 x i1> [[TMP0]], <16 x i8> [[VC:%.*]]) +// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP:%.*]], align 128, !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: ret void +// +void test_dmxvi8gerx4(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { + __dmr1024 vdmr = *((__dmr1024 *)vdmrp); + __vector_pair vp = *((__vector_pair *)vpp); + __builtin_mma_dmxvi8gerx4(&vdmr, vp, vc); + *((__dmr1024 *)resp) = vdmr; +} + +// CHECK-LABEL: @test_pmdmxvi8gerx4( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = load <256 x i1>, ptr [[VPP:%.*]], align 32, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4(<256 x i1> [[TMP0]], <16 x i8> [[VC:%.*]], i32 0, i32 0, i32 0) +// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP:%.*]], align 128, !tbaa [[TBAA6]] +// CHECK-NEXT: ret void +// +void test_pmdmxvi8gerx4(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { + __dmr1024 vdmr = *((__dmr1024 *)vdmrp); + __vector_pair vp = *((__vector_pair *)vpp); + __builtin_mma_pmdmxvi8gerx4(&vdmr, vp, vc, 0, 0, 0); + *((__dmr1024 *)resp) = vdmr; +} + +// CHECK-LABEL: @test_dmxvi8gerx4pp( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP:%.*]], align 128, !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP:%.*]], align 32, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4pp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC:%.*]]) +// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP:%.*]], align 128, !tbaa [[TBAA6]] +// CHECK-NEXT: ret void +// +void test_dmxvi8gerx4pp(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { + __dmr1024 vdmr = *((__dmr1024 *)vdmrp); + __vector_pair vp = *((__vector_pair *)vpp); + __builtin_mma_dmxvi8gerx4pp(&vdmr, vp, vc); + *((__dmr1024 *)resp) = vdmr; +} + +// CHECK-LABEL: @test_pmdmxvi8gerx4pp( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP:%.*]], align 128, !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP:%.*]], align 32, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4pp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC:%.*]], i32 0, i32 0, i32 0) +// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP:%.*]], align 128, !tbaa [[TBAA6]] +// CHECK-NEXT: ret void +// +void test_pmdmxvi8gerx4pp(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { + __dmr1024 vdmr = *((__dmr1024 *)vdmrp); + __vector_pair vp = *((__vector_pair *)vpp); + __builtin_mma_pmdmxvi8gerx4pp(&vdmr, vp, vc, 0, 0, 0); + *((__dmr1024 *)resp) = vdmr; +} + +// CHECK-LABEL: @test_dmxvi8gerx4spp( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP:%.*]], align 128, !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP:%.*]], align 32, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4spp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC:%.*]]) +// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP:%.*]], align 128, !tbaa [[TBAA6]] +// CHECK-NEXT: ret void +// +void test_dmxvi8gerx4spp(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { + __dmr1024 vdmr = *((__dmr1024 *)vdmrp); + __vector_pair vp = *((__vector_pair *)vpp); + __builtin_mma_dmxvi8gerx4spp(&vdmr, vp, vc); + *((__dmr1024 *)resp) = vdmr; +} + +// CHECK-LABEL: @test_pmdmxvi8gerx4spp( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP:%.*]], align 128, !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP:%.*]], align 32, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4spp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC:%.*]], i32 0, i32 0, i32 0) +// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP:%.*]], align 128, !tbaa [[TBAA6]] +// CHECK-NEXT: ret void +// +void test_pmdmxvi8gerx4spp(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { + __dmr1024 vdmr = *((__dmr1024 *)vdmrp); + __vector_pair vp = *((__vector_pair *)vpp); + __builtin_mma_pmdmxvi8gerx4spp(&vdmr, vp, vc, 0, 0, 0); + *((__dmr1024 *)resp) = vdmr; +} diff --git a/clang/test/CodeGen/PowerPC/ppc-dmf-paired-vec-memops-builtin-err.c b/clang/test/CodeGen/PowerPC/ppc-dmf-paired-vec-memops-builtin-err.c new file mode 100644 index 0000000000000..eef1abca22417 --- /dev/null +++ b/clang/test/CodeGen/PowerPC/ppc-dmf-paired-vec-memops-builtin-err.c @@ -0,0 +1,20 @@ +// RUN: not %clang_cc1 -triple powerpc64le-unknown-linux-gnu -target-cpu future \ +// RUN: %s -emit-llvm-only 2>&1 | FileCheck %s + +__attribute__((target("no-paired-vector-memops"))) +void test_pair(unsigned char *vdmr, unsigned char *vpp, vector unsigned char vc) { + __vector_pair vp = *((__vector_pair *)vpp); + __builtin_mma_dmxvi8gerx4((__dmr1024 *)vdmr, vp, vc); + __builtin_mma_pmdmxvi8gerx4((__dmr1024 *)vdmr, vp, vc, 0, 0, 0); + __builtin_mma_dmxvi8gerx4pp((__dmr1024 *)vdmr, vp, vc); + __builtin_mma_pmdmxvi8gerx4pp((__dmr1024 *)vdmr, vp, vc, 0, 0, 0); + __builtin_mma_dmxvi8gerx4spp((__dmr1024 *)vdmr, vp, vc); + __builtin_mma_pmdmxvi8gerx4spp((__dmr1024 *)vdmr, vp, vc, 0, 0, 0); + +// CHECK: error: '__builtin_mma_dmxvi8gerx4' needs target feature mma,paired-vector-memops +// CHECK: error: '__builtin_mma_pmdmxvi8gerx4' needs target feature mma,paired-vector-memops +// CHECK: error: '__builtin_mma_dmxvi8gerx4pp' needs target feature mma,paired-vector-memops +// CHECK: error: '__builtin_mma_pmdmxvi8gerx4pp' needs target feature mma,paired-vector-memops +// CHECK: error: '__builtin_mma_dmxvi8gerx4spp' needs target feature mma,paired-vector-memops +// CHECK: error: '__builtin_mma_pmdmxvi8gerx4spp' needs target feature mma,paired-vector-memops +} diff --git a/clang/test/CodeGen/PowerPC/ppc-dmf-types.c b/clang/test/CodeGen/PowerPC/ppc-dmf-types.c new file mode 100644 index 0000000000000..9dff289370eb5 --- /dev/null +++ b/clang/test/CodeGen/PowerPC/ppc-dmf-types.c @@ -0,0 +1,177 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py +// RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cpu future \ +// RUN: -emit-llvm -o - %s | FileCheck %s + + +// CHECK-LABEL: @test_dmr_copy( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[PTR1_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[PTR2_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: store ptr [[PTR1:%.*]], ptr [[PTR1_ADDR]], align 8 +// CHECK-NEXT: store ptr [[PTR2:%.*]], ptr [[PTR2_ADDR]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR1_ADDR]], align 8 +// CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds <1024 x i1>, ptr [[TMP0]], i64 2 +// CHECK-NEXT: [[TMP1:%.*]] = load <1024 x i1>, ptr [[ADD_PTR]], align 128 +// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[PTR2_ADDR]], align 8 +// CHECK-NEXT: [[ADD_PTR1:%.*]] = getelementptr inbounds <1024 x i1>, ptr [[TMP2]], i64 1 +// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[ADD_PTR1]], align 128 +// CHECK-NEXT: ret void +// +void test_dmr_copy(__dmr1024 *ptr1, __dmr1024 *ptr2) { + *(ptr2 + 1) = *(ptr1 + 2); +} + +// CHECK-LABEL: @test_dmr_typedef( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[INP_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[OUTP_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[VDMRIN:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[VDMROUT:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: store ptr [[INP:%.*]], ptr [[INP_ADDR]], align 8 +// CHECK-NEXT: store ptr [[OUTP:%.*]], ptr [[OUTP_ADDR]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[INP_ADDR]], align 8 +// CHECK-NEXT: store ptr [[TMP0]], ptr [[VDMRIN]], align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[OUTP_ADDR]], align 8 +// CHECK-NEXT: store ptr [[TMP1]], ptr [[VDMROUT]], align 8 +// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VDMRIN]], align 8 +// CHECK-NEXT: [[TMP3:%.*]] = load <1024 x i1>, ptr [[TMP2]], align 128 +// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[VDMROUT]], align 8 +// CHECK-NEXT: store <1024 x i1> [[TMP3]], ptr [[TMP4]], align 128 +// CHECK-NEXT: ret void +// +void test_dmr_typedef(int *inp, int *outp) { + __dmr1024 *vdmrin = (__dmr1024 *)inp; + __dmr1024 *vdmrout = (__dmr1024 *)outp; + *vdmrout = *vdmrin; +} + +// CHECK-LABEL: @test_dmr_arg( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[VDMR_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[VDMRP:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: store ptr [[VDMR:%.*]], ptr [[VDMR_ADDR]], align 8 +// CHECK-NEXT: store ptr [[PTR:%.*]], ptr [[PTR_ADDR]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8 +// CHECK-NEXT: store ptr [[TMP0]], ptr [[VDMRP]], align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VDMR_ADDR]], align 8 +// CHECK-NEXT: [[TMP2:%.*]] = load <1024 x i1>, ptr [[TMP1]], align 128 +// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VDMRP]], align 8 +// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[TMP3]], align 128 +// CHECK-NEXT: ret void +// +void test_dmr_arg(__dmr1024 *vdmr, int *ptr) { + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + *vdmrp = *vdmr; +} + +// CHECK-LABEL: @test_dmr_const_arg( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[VDMR_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[VDMRP:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: store ptr [[VDMR:%.*]], ptr [[VDMR_ADDR]], align 8 +// CHECK-NEXT: store ptr [[PTR:%.*]], ptr [[PTR_ADDR]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8 +// CHECK-NEXT: store ptr [[TMP0]], ptr [[VDMRP]], align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VDMR_ADDR]], align 8 +// CHECK-NEXT: [[TMP2:%.*]] = load <1024 x i1>, ptr [[TMP1]], align 128 +// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VDMRP]], align 8 +// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[TMP3]], align 128 +// CHECK-NEXT: ret void +// +void test_dmr_const_arg(const __dmr1024 *const vdmr, int *ptr) { + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + *vdmrp = *vdmr; +} + +// CHECK-LABEL: @test_dmr_array_arg( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[VDMRA_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[VDMRP:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: store ptr [[VDMRA:%.*]], ptr [[VDMRA_ADDR]], align 8 +// CHECK-NEXT: store ptr [[PTR:%.*]], ptr [[PTR_ADDR]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8 +// CHECK-NEXT: store ptr [[TMP0]], ptr [[VDMRP]], align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VDMRA_ADDR]], align 8 +// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds <1024 x i1>, ptr [[TMP1]], i64 0 +// CHECK-NEXT: [[TMP2:%.*]] = load <1024 x i1>, ptr [[ARRAYIDX]], align 128 +// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VDMRP]], align 8 +// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[TMP3]], align 128 +// CHECK-NEXT: ret void +// +void test_dmr_array_arg(__dmr1024 vdmra[], int *ptr) { + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + *vdmrp = vdmra[0]; +} + +// CHECK-LABEL: @test_dmr_ret( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[VDMRP:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: store ptr [[PTR:%.*]], ptr [[PTR_ADDR]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8 +// CHECK-NEXT: store ptr [[TMP0]], ptr [[VDMRP]], align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VDMRP]], align 8 +// CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds <1024 x i1>, ptr [[TMP1]], i64 2 +// CHECK-NEXT: ret ptr [[ADD_PTR]] +// +__dmr1024 *test_dmr_ret(int *ptr) { + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + return vdmrp + 2; +} + +// CHECK-LABEL: @test_dmr_ret_const( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[VDMRP:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: store ptr [[PTR:%.*]], ptr [[PTR_ADDR]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8 +// CHECK-NEXT: store ptr [[TMP0]], ptr [[VDMRP]], align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VDMRP]], align 8 +// CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds <1024 x i1>, ptr [[TMP1]], i64 2 +// CHECK-NEXT: ret ptr [[ADD_PTR]] +// +const __dmr1024 *test_dmr_ret_const(int *ptr) { + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + return vdmrp + 2; +} + +// CHECK-LABEL: @test_dmr_sizeof_alignof( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[VDMRP:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[VDMR:%.*]] = alloca <1024 x i1>, align 128 +// CHECK-NEXT: [[SIZET:%.*]] = alloca i32, align 4 +// CHECK-NEXT: [[ALIGNT:%.*]] = alloca i32, align 4 +// CHECK-NEXT: [[SIZEV:%.*]] = alloca i32, align 4 +// CHECK-NEXT: [[ALIGNV:%.*]] = alloca i32, align 4 +// CHECK-NEXT: store ptr [[PTR:%.*]], ptr [[PTR_ADDR]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8 +// CHECK-NEXT: store ptr [[TMP0]], ptr [[VDMRP]], align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VDMRP]], align 8 +// CHECK-NEXT: [[TMP2:%.*]] = load <1024 x i1>, ptr [[TMP1]], align 128 +// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[VDMR]], align 128 +// CHECK-NEXT: store i32 128, ptr [[SIZET]], align 4 +// CHECK-NEXT: store i32 128, ptr [[ALIGNT]], align 4 +// CHECK-NEXT: store i32 128, ptr [[SIZEV]], align 4 +// CHECK-NEXT: store i32 128, ptr [[ALIGNV]], align 4 +// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[SIZET]], align 4 +// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[ALIGNT]], align 4 +// CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP3]], [[TMP4]] +// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[SIZEV]], align 4 +// CHECK-NEXT: [[ADD1:%.*]] = add i32 [[ADD]], [[TMP5]] +// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[ALIGNV]], align 4 +// CHECK-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], [[TMP6]] +// CHECK-NEXT: ret i32 [[ADD2]] +// +int test_dmr_sizeof_alignof(int *ptr) { + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + __dmr1024 vdmr = *vdmrp; + unsigned sizet = sizeof(__dmr1024); + unsigned alignt = __alignof__(__dmr1024); + unsigned sizev = sizeof(vdmr); + unsigned alignv = __alignof__(vdmr); + return sizet + alignt + sizev + alignv; +} diff --git a/clang/test/CodeGen/PowerPC/ppc-future-mma-builtin-err.c b/clang/test/CodeGen/PowerPC/ppc-future-mma-builtin-err.c new file mode 100644 index 0000000000000..1b8d345ac7ec7 --- /dev/null +++ b/clang/test/CodeGen/PowerPC/ppc-future-mma-builtin-err.c @@ -0,0 +1,21 @@ +// RUN: not %clang_cc1 -triple powerpc64le-unknown-linux-gnu -target-cpu future \ +// RUN: %s -emit-llvm-only 2>&1 | FileCheck %s + +__attribute__((target("no-mma"))) +void test_mma(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc) { + __dmr1024 vdmr = *((__dmr1024 *)vdmrp); + __vector_pair vp = *((__vector_pair *)vpp); + __builtin_mma_dmxvi8gerx4(&vdmr, vp, vc); + __builtin_mma_pmdmxvi8gerx4(&vdmr, vp, vc, 0, 0, 0); + __builtin_mma_dmxvi8gerx4pp(&vdmr, vp, vc); + __builtin_mma_pmdmxvi8gerx4pp(&vdmr, vp, vc, 0, 0, 0); + __builtin_mma_dmxvi8gerx4spp(&vdmr, vp, vc); + __builtin_mma_pmdmxvi8gerx4spp(&vdmr, vp, vc, 0, 0, 0); + +// CHECK: error: '__builtin_mma_dmxvi8gerx4' needs target feature mma,paired-vector-memops +// CHECK: error: '__builtin_mma_pmdmxvi8gerx4' needs target feature mma,paired-vector-memops +// CHECK: error: '__builtin_mma_dmxvi8gerx4pp' needs target feature mma,paired-vector-memops +// CHECK: error: '__builtin_mma_pmdmxvi8gerx4pp' needs target feature mma,paired-vector-memops +// CHECK: error: '__builtin_mma_dmxvi8gerx4spp' needs target feature mma,paired-vector-memops +// CHECK: error: '__builtin_mma_pmdmxvi8gerx4spp' needs target feature mma,paired-vector-memops +} diff --git a/clang/test/CodeGenCXX/ppc-mangle-mma-types.cpp b/clang/test/CodeGenCXX/ppc-mangle-mma-types.cpp index 74e50ceea386b..1e213e7f75127 100644 --- a/clang/test/CodeGenCXX/ppc-mangle-mma-types.cpp +++ b/clang/test/CodeGenCXX/ppc-mangle-mma-types.cpp @@ -1,3 +1,5 @@ +// RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cpu future %s \ +// RUN: -emit-llvm -o - | FileCheck %s // RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cpu pwr10 %s \ // RUN: -emit-llvm -o - | FileCheck %s // RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cpu pwr9 %s \ @@ -5,6 +7,9 @@ // RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cpu pwr8 %s \ // RUN: -emit-llvm -o - | FileCheck %s +// CHECK: _Z2f0Pu9__dmr1024 +void f0(__dmr1024 *vdmr) {} + // CHECK: _Z2f1Pu13__vector_quad void f1(__vector_quad *vq) {} diff --git a/clang/test/Sema/ppc-dmf-types.c b/clang/test/Sema/ppc-dmf-types.c new file mode 100644 index 0000000000000..b3da72df25081 --- /dev/null +++ b/clang/test/Sema/ppc-dmf-types.c @@ -0,0 +1,103 @@ +// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -fsyntax-only \ +// RUN: -target-cpu future %s -verify +// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -fsyntax-only \ +// RUN: -target-cpu future %s -verify + +// The use of PPC MMA types is strongly restricted. Non-pointer MMA variables +// can only be declared in functions and a limited number of operations are +// supported on these types. This test case checks that invalid uses of MMA +// types are correctly prevented. + +// vector dmr + +// typedef +typedef __dmr1024 dmr_t; + +// function argument +void testDmrArg1(__dmr1024 vdmr, int *ptr) { // expected-error {{invalid use of PPC MMA type}} + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + *vdmrp = vdmr; +} + +void testDmrArg2(const __dmr1024 vdmr, int *ptr) { // expected-error {{invalid use of PPC MMA type}} + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + *vdmrp = vdmr; +} + +void testDmrArg3(const dmr_t vdmr, int *ptr) { // expected-error {{invalid use of PPC MMA type}} + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + *vdmrp = vdmr; +} + +// function return +__dmr1024 testDmrRet1(int *ptr) { // expected-error {{invalid use of PPC MMA type}} + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + return *vdmrp; // expected-error {{invalid use of PPC MMA type}} +} + +const dmr_t testDmrRet4(int *ptr) { // expected-error {{invalid use of PPC MMA type}} + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + return *vdmrp; // expected-error {{invalid use of PPC MMA type}} +} + +// global +__dmr1024 globalvdmr; // expected-error {{invalid use of PPC MMA type}} +const __dmr1024 globalvdmr2; // expected-error {{invalid use of PPC MMA type}} +__dmr1024 *globalvdmrp; +const __dmr1024 *const globalvdmrp2; +dmr_t globalvdmr_t; // expected-error {{invalid use of PPC MMA type}} + +// struct field +struct TestDmrStruct { + int a; + float b; + __dmr1024 c; // expected-error {{invalid use of PPC MMA type}} + __dmr1024 *vq; +}; + +// operators +int testDmrOperators1(int *ptr) { + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + __dmr1024 vdmr1 = *(vdmrp + 0); + __dmr1024 vdmr2 = *(vdmrp + 1); + __dmr1024 vdmr3 = *(vdmrp + 2); + if (vdmr1) // expected-error {{statement requires expression of scalar type ('__dmr1024' invalid)}} + *(vdmrp + 10) = vdmr1; + if (!vdmr2) // expected-error {{invalid argument type '__dmr1024' to unary expression}} + *(vdmrp + 11) = vdmr3; + int c1 = vdmr1 && vdmr2; // expected-error {{invalid operands to binary expression ('__dmr1024' and '__dmr1024')}} + int c2 = vdmr2 == vdmr3; // expected-error {{invalid operands to binary expression ('__dmr1024' and '__dmr1024')}} + int c3 = vdmr2 < vdmr1; // expected-error {{invalid operands to binary expression ('__dmr1024' and '__dmr1024')}} + return c1 || c2 || c3; +} + +void testDmrOperators2(int *ptr) { + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + __dmr1024 vdmr1 = *(vdmrp + 0); + __dmr1024 vdmr2 = *(vdmrp + 1); + __dmr1024 vdmr3 = *(vdmrp + 2); + vdmr1 = -vdmr1; // expected-error {{invalid argument type '__dmr1024' to unary expression}} + vdmr2 = vdmr1 + vdmr3; // expected-error {{invalid operands to binary expression ('__dmr1024' and '__dmr1024')}} + vdmr2 = vdmr2 * vdmr3; // expected-error {{invalid operands to binary expression ('__dmr1024' and '__dmr1024')}} + vdmr3 = vdmr3 | vdmr3; // expected-error {{invalid operands to binary expression ('__dmr1024' and '__dmr1024')}} + vdmr3 = vdmr3 << 2; // expected-error {{invalid operands to binary expression ('__dmr1024' and 'int')}} + *(vdmrp + 10) = vdmr1; + *(vdmrp + 11) = vdmr2; + *(vdmrp + 12) = vdmr3; +} + +vector unsigned char testDmrOperators3(int *ptr) { + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + __dmr1024 vdmr1 = *(vdmrp + 0); + __dmr1024 vdmr2 = *(vdmrp + 1); + __dmr1024 vdmr3 = *(vdmrp + 2); + vdmr1 ? *(vdmrp + 10) = vdmr2 : *(vdmrp + 11) = vdmr3; // expected-error {{used type '__dmr1024' where arithmetic or pointer type is required}} + vdmr2 = vdmr3; + return vdmr2[1]; // expected-error {{subscripted value is not an array, pointer, or vector}} +} + +void testDmrOperators4(int v, void *ptr) { + __dmr1024 *vdmrp = (__dmr1024 *)ptr; + __dmr1024 vdmr1 = (__dmr1024)v; // expected-error {{used type '__dmr1024' where arithmetic or pointer type is required}} + __dmr1024 vdmr2 = (__dmr1024)vdmrp; // expected-error {{used type '__dmr1024' where arithmetic or pointer type is required}} +} diff --git a/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp b/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp index 29302413cf8fb..82e07bb8e0ffb 100644 --- a/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp +++ b/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp @@ -5024,6 +5024,7 @@ lldb::Encoding TypeSystemClang::GetEncoding(lldb::opaque_compiler_type_t type, // PowerPC -- Matrix Multiply Assist case clang::BuiltinType::VectorPair: case clang::BuiltinType::VectorQuad: + case clang::BuiltinType::DMR1024: break; // ARM -- Scalable Vector Extension _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
