omjavaid created this revision.
omjavaid added reviewers: tberghammer, clayborg.
omjavaid added a subscriber: lldb-commits.
Herald added subscribers: rengolin, aemerson.
This patch adds logic to detect if underlying binary is using arm hard float
abi and use that information while handling return values in ABISysV_arm.
This patch only handles float and double passed using floating point registers.
More return types and argument passing will be handled in a follow up patches.
http://reviews.llvm.org/D16627
Files:
include/lldb/Core/ArchSpec.h
source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp
source/Plugins/ABI/SysV-arm/ABISysV_arm.h
source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
Index: source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===================================================================
--- source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -1562,6 +1562,15 @@
}
}
+ if (arch_spec.GetMachine() == llvm::Triple::arm ||
+ arch_spec.GetMachine() == llvm::Triple::thumb)
+ {
+ if (header.e_flags & llvm::ELF::EF_ARM_SOFT_FLOAT)
+ arch_spec.SetFlags (ArchSpec::eARM_abi_soft_float);
+ else if (header.e_flags & llvm::ELF::EF_ARM_VFP_FLOAT)
+ arch_spec.SetFlags (ArchSpec::eARM_abi_hard_float);
+ }
+
// If there are no section headers we are done.
if (header.e_shnum == 0)
return 0;
Index: source/Plugins/ABI/SysV-arm/ABISysV_arm.h
===================================================================
--- source/Plugins/ABI/SysV-arm/ABISysV_arm.h
+++ source/Plugins/ABI/SysV-arm/ABISysV_arm.h
@@ -79,6 +79,9 @@
const lldb_private::RegisterInfo *
GetRegisterInfoArray (uint32_t &count) override;
+ bool
+ IsArmHardFloat (lldb_private::Thread *thread) const;
+
//------------------------------------------------------------------
// Static Functions
//------------------------------------------------------------------
Index: source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp
===================================================================
--- source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp
+++ source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp
@@ -414,6 +414,25 @@
return true;
}
+bool
+ABISysV_arm::IsArmHardFloat (Thread *thread) const
+{
+ bool is_armhf = false;
+ if (thread)
+ {
+ ProcessSP process_sp (thread->GetProcess());
+ if (process_sp)
+ {
+ const ArchSpec &arch (process_sp->GetTarget().GetArchitecture());
+ if (arch.GetFlags() == ArchSpec::eARM_abi_hard_float)
+ {
+ is_armhf = true;
+ }
+ }
+ }
+ return is_armhf;
+}
+
ValueObjectSP
ABISysV_arm::GetReturnValueObjectImpl (Thread &thread,
lldb_private::CompilerType &compiler_type) const
@@ -516,19 +535,44 @@
case 64:
{
static_assert(sizeof(double) == sizeof(uint64_t), "");
- const RegisterInfo *r1_reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2);
- uint64_t raw_value;
- raw_value = reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
- raw_value |= ((uint64_t)(reg_ctx->ReadRegisterAsUnsigned(r1_reg_info, 0) & UINT32_MAX)) << 32;
- value.GetScalar() = *reinterpret_cast<double*>(&raw_value);
+
+ if (!IsArmHardFloat(&thread))
+ {
+ uint64_t raw_value;
+ const RegisterInfo *r1_reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2);
+ raw_value = reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
+ raw_value |= ((uint64_t)(reg_ctx->ReadRegisterAsUnsigned(r1_reg_info, 0) & UINT32_MAX)) << 32;
+ value.GetScalar() = *reinterpret_cast<double*>(&raw_value);
+ }
+ else
+ {
+ RegisterValue reg_value;
+ const RegisterInfo *d0_reg_info = reg_ctx->GetRegisterInfoByName("d0", 0);
+ reg_ctx->ReadRegister(d0_reg_info, reg_value);
+ value.GetScalar() = reg_value.GetAsDouble();
+ }
+
break;
}
case 16: // Half precision returned after a conversion to single precision
case 32:
{
static_assert(sizeof(float) == sizeof(uint32_t), "");
- uint32_t raw_value = reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
- value.GetScalar() = *reinterpret_cast<float*>(&raw_value);
+
+ if (!IsArmHardFloat(&thread))
+ {
+ uint32_t raw_value;
+ raw_value = reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
+ value.GetScalar() = *reinterpret_cast<float*>(&raw_value);
+ }
+ else
+ {
+ RegisterValue reg_value;
+ const RegisterInfo *s0_reg_info = reg_ctx->GetRegisterInfoByName("s0", 0);
+ reg_ctx->ReadRegister(s0_reg_info, reg_value);
+ value.GetScalar() = reg_value.GetAsFloat();
+ }
+
break;
}
}
Index: include/lldb/Core/ArchSpec.h
===================================================================
--- include/lldb/Core/ArchSpec.h
+++ include/lldb/Core/ArchSpec.h
@@ -72,6 +72,13 @@
eMIPSABI_mask = 0x000ff000
};
+ // ARM specific e_flags
+ enum ARMeflags
+ {
+ eARM_abi_soft_float = 0x00000200,
+ eARM_abi_hard_float = 0x00000400
+ };
+
enum Core
{
eCore_arm_generic,
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