nitesh.jain created this revision.
nitesh.jain added reviewers: jaydeep, clayborg, ovyalov.
nitesh.jain added subscribers: bhushan, sagar, mohit.bhakkad, lldb-commits.
nitesh.jain set the repository for this revision to rL LLVM.
This patch check whether first register is readable.
Repository:
rL LLVM
http://reviews.llvm.org/D14635
Files:
packages/Python/lldbsuite/test/lldbplatformutil.py
Index: packages/Python/lldbsuite/test/lldbplatformutil.py
===================================================================
--- packages/Python/lldbsuite/test/lldbplatformutil.py
+++ packages/Python/lldbsuite/test/lldbplatformutil.py
@@ -1,13 +1,16 @@
""" This module contains functions used by the test cases to hide the
architecture and/or the platform dependent nature of the tests. """
-
+import re
def check_first_register_readable(test_case):
- if test_case.getArchitecture() in ['x86_64', 'i386']:
+ arch = test_case.getArchitecture()
+ if arch in ['x86_64', 'i386']:
test_case.expect("register read eax", substrs = ['eax = 0x'])
- elif test_case.getArchitecture() in ['arm']:
+ elif arch in ['arm']:
test_case.expect("register read r0", substrs = ['r0 = 0x'])
- elif test_case.getArchitecture() in ['aarch64']:
+ elif arch in ['aarch64']:
test_case.expect("register read x0", substrs = ['x0 = 0x'])
+ elif re.match("mips",arch):
+ test_case.expect("register read zero", substrs = ['zero = 0x'])
else:
# TODO: Add check for other architectures
test_case.fail("Unsupported architecture for test case (arch: %s)" %
test_case.getArchitecture())
Index: packages/Python/lldbsuite/test/lldbplatformutil.py
===================================================================
--- packages/Python/lldbsuite/test/lldbplatformutil.py
+++ packages/Python/lldbsuite/test/lldbplatformutil.py
@@ -1,13 +1,16 @@
""" This module contains functions used by the test cases to hide the
architecture and/or the platform dependent nature of the tests. """
-
+import re
def check_first_register_readable(test_case):
- if test_case.getArchitecture() in ['x86_64', 'i386']:
+ arch = test_case.getArchitecture()
+ if arch in ['x86_64', 'i386']:
test_case.expect("register read eax", substrs = ['eax = 0x'])
- elif test_case.getArchitecture() in ['arm']:
+ elif arch in ['arm']:
test_case.expect("register read r0", substrs = ['r0 = 0x'])
- elif test_case.getArchitecture() in ['aarch64']:
+ elif arch in ['aarch64']:
test_case.expect("register read x0", substrs = ['x0 = 0x'])
+ elif re.match("mips",arch):
+ test_case.expect("register read zero", substrs = ['zero = 0x'])
else:
# TODO: Add check for other architectures
test_case.fail("Unsupported architecture for test case (arch: %s)" % test_case.getArchitecture())
_______________________________________________
lldb-commits mailing list
lldb-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
