Hi,
This patch series update 4k subpage tracking in pte page, thereby reducing
the ptefragment size. This results in us allocating less number of
pgtable_t for an application. One of the side effect is that we now make
and hcall to find out whether a 4k subpage is present in the hash page table or
not.
We try to optmize that in patch "powerpc/mm: Optmize the hashed subpage
iteration"
Changes from V1:
* rebased on top of 4.3 + change pte format series
* Use H_READ_4 so that we read 4 hpte slot information in single hcall.
Aneesh Kumar K.V (10):
powerpc/mm: Don't hardcode page table size
powerpc/mm: Don't hardcode the hash pte slot shift
powerpc/nohash: Update 64K nohash config to have 32 pte fragement
powerpc/nohash: we don't use real_pte_t for nohash
powerpc/mm: Use H_READ with H_READ_4
powerpc/mm: Don't track 4k subpage information with 64k linux page
size
powerpc/mm: update PTE frag size
powerpc/mm: Update pte_iterate_hashed_subpages args
powerpc/mm: Drop real_pte_t usage
powerpc/mm: Optmize the hashed subpage iteration
arch/powerpc/include/asm/book3s/64/hash-64k.h | 82 ++++++++-----------
arch/powerpc/include/asm/book3s/64/pgtable.h | 35 ++++----
arch/powerpc/include/asm/machdep.h | 1 +
arch/powerpc/include/asm/nohash/64/pgtable-64k.h | 21 ++++-
arch/powerpc/include/asm/nohash/64/pgtable.h | 33 --------
arch/powerpc/include/asm/page.h | 15 ----
arch/powerpc/include/asm/pgalloc-64.h | 10 ---
arch/powerpc/include/asm/plpar_wrappers.h | 17 ++++
arch/powerpc/include/asm/tlbflush.h | 4 +-
arch/powerpc/mm/hash64_64k.c | 100 ++++++++++++++---------
arch/powerpc/mm/hash_native_64.c | 55 +++++++++++--
arch/powerpc/mm/hash_utils_64.c | 13 +--
arch/powerpc/mm/init_64.c | 7 +-
arch/powerpc/mm/pgtable_64.c | 6 +-
arch/powerpc/mm/tlb_hash64.c | 15 ++--
arch/powerpc/platforms/pseries/lpar.c | 90 +++++++++++++-------
16 files changed, 279 insertions(+), 225 deletions(-)
--
2.5.0
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