On Fri, Oct 16, 2015 at 07:01:55PM -0500, Scott Wood wrote: > On Tue, Aug 18, 2015 at 03:55:56PM +0800, Kevin Hao wrote: > > diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S > > index e4185581c5a7..3a5b89dfb5a1 100644 > > --- a/arch/powerpc/mm/tlb_low_64e.S > > +++ b/arch/powerpc/mm/tlb_low_64e.S > > @@ -68,11 +68,21 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV) > > ld r14,PACAPGD(r13) > > std r15,EX_TLB_R15(r12) > > std r10,EX_TLB_CR(r12) > > +#ifdef CONFIG_PPC_FSL_BOOK3E > > +BEGIN_FTR_SECTION > > + std r7,EX_TLB_R7(r12) > > +END_FTR_SECTION_IFSET(CPU_FTR_SMT) > > +#endif > > TLB_MISS_PROLOG_STATS > > .endm > > > > .macro tlb_epilog_bolted > > ld r14,EX_TLB_CR(r12) > > +#ifdef CONFIG_PPC_FSL_BOOK3E > > +BEGIN_FTR_SECTION > > + ld r7,EX_TLB_R7(r12) > > +END_FTR_SECTION_IFSET(CPU_FTR_SMT) > > +#endif > > r7 is used outside the CPU_FTR_SMT section of the e6500 TLB handler.
Sorry for the delay response just back from vacation. I will move the load of TCD_ESEL_NEXT out of CPU_FTR_SMT wrap. Thanks, Kevin
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