On Wed, Jan 21, 2015 at 10:53:20AM -0800, Nicolin Chen wrote: > On Tue, Jan 20, 2015 at 08:21:20PM +0800, Zidan Wang wrote: > > Add Right-J mode and set TCR5 FBT bit to let data right justify. > > > > Signed-off-by: Zidan Wang <zidan.w...@freescale.com> > > > - if (sai->is_lsb_first) > > + if (sai->is_lsb_first && sai->is_right_j_mode) > > val_cr5 |= FSL_SAI_CR5_FBT(0); > > Are you sure that FBT(0) is correct for right justified mode? > Because the original code is using FBT(0) for the lsb_first > situation and it shouldn't be right justified mode as default. > I am not sure about that.
I assume lsb_first as big endian data. For 16 bit data format, the 2 bytes data will in high address of 4 bytes fifo. So the FBT is 16 for left-j and 0 for right-j. But big endian is bytes convert not bits convert. It makes me confuse. And send to community for help. > Nicolin _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
