This patchset create the infrastructure to handle the CR based local_* atomic operations. Local atomic operations are fast and highly reentrant per CPU counters. Used for percpu variable updates. Local atomic operations only guarantee variable modification atomicity wrt the CPU which owns the data and these needs to be executed in a preemption safe way.
Here is the design of the first patch. Since local_* operations are only need to be atomic to interrupts (IIUC), patch uses one of the Condition Register (CR) fields as a flag variable. When entering the local_*, specific bit in the CR5 field is set and on exit, bit is cleared. CR bit checking is done in the interrupt return path. If CR5[EQ] bit set and if we return to kernel, we reset to start of local_* operation. Reason for this approach is that, currently l[w/d]arx/st[w/d]cx. instruction pair is used for local_* operations, which are heavy on cycle count and they dont support a local varient. So to see whether the new implementation helps, Used a modified version of Rusty's benchmark code on local_t. Have the performance numbers in the patch commit message. Second patch has the rewrite of the local_* functions to use CR5 based logic. Changes are mostly in asm/local.h and only for CONFIG_PPC64 Madhavan Srinivasan (2): powerpc: foundation code to handle CR5 for local_t powerpc: rewrite local_* to use CR5 flag Makefile | 6 + arch/powerpc/include/asm/exception-64s.h | 21 ++- arch/powerpc/include/asm/local.h | 306 +++++++++++++++++++++++++++++++ arch/powerpc/kernel/entry_64.S | 106 ++++++++++- arch/powerpc/kernel/exceptions-64s.S | 2 +- arch/powerpc/kernel/head_64.S | 8 + 6 files changed, 444 insertions(+), 5 deletions(-) -- 1.9.1 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
