On Wed, 2014-09-10 at 07:27 -0500, Wood Scott-B07421 wrote: > -----Original Message----- > From: Wood Scott-B07421 > Sent: Wednesday, September 10, 2014 7:27 AM > To: Zhao Qiang-B45475 > Cc: Li Yang-Leo-R58472; linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63061; > linux-ker...@vger.kernel.org > Subject: Re: [PATCH v2] QE: move qe code from arch/powerpc to drivers/soc > > On Tue, 2014-09-09 at 04:27 -0500, Zhao Qiang-B45475 wrote: > > On Fri, 2014-09-05 at 06:47 AM, Wood Scott wrote: > > > > > > > > > Subject: Re: [PATCH v2] QE: move qe code from arch/powerpc to > > > drivers/soc > > > > > > On Thu, 2014-09-04 at 13:06 +0800, Zhao Qiang wrote: > > > > LS1 is arm cpu and it has qe ip block. > > > > move qe code from platform directory to public directory. > > > > > > > > QE is an IP block integrates several comunications peripheral > > > > controllers. It can implement a variety of applications, such as > > > > uart, usb and tdm and so on. > > > > > > > > Signed-off-by: Zhao Qiang <b45...@freescale.com> > > > > --- > > > > Changes for v2: > > > > - mv code to drivers/soc > > > > > > Who will be the maintainer of this code once it lives in > > > drivers/soc, especially once it is no longer used only by PPC? > > > > I have no idea about that, can you explain why you want to know who > will be the maintainer. > > Currently it falls within "Freescale PPC" which I maintain. This moves > it out of arch/powerpc and is the first step towards making it not be > PPC-specific. Whose tree are you expecting patches to drivers/soc/fsl-qe > to go through?
How about network tree? > > > > > diff --git a/drivers/soc/qe/Kconfig b/drivers/soc/qe/Kconfig new > > > > file mode 100644 index 0000000..8b03ca2 > > > > --- /dev/null > > > > +++ b/drivers/soc/qe/Kconfig > > > > @@ -0,0 +1,45 @@ > > > > +# > > > > +# QE Communication options > > > > +# > > > > +config QUICC_ENGINE > > > > + bool "Freescale QUICC Engine (QE) Support" > > > > + depends on FSL_SOC && PPC32 > > > > + select PPC_LIB_RHEAP > > > > + select CRC32 > > > > + help > > > > + The QUICC Engine (QE) is a new generation of communications > > > > + coprocessors on Freescale embedded CPUs (akin to CPM in > older > > > chips). > > > > + Selecting this option means that you wish to build a kernel > > > > + for a machine with a QE coprocessor. > > > > + > > > > +config QE_GPIO > > > > + bool "QE GPIO support" > > > > + depends on QUICC_ENGINE > > > > + select ARCH_REQUIRE_GPIOLIB > > > > + help > > > > + Say Y here if you're going to use hardware that connects to > the > > > > + QE GPIOs. > > > > + > > > > +config UCC_SLOW > > > > + bool > > > > + default y if SERIAL_QE > > > > + help > > > > + This option provides qe_lib support to UCC slow > > > > + protocols: UART, BISYNC, QMC > > > > + > > > > +config UCC_FAST > > > > + bool > > > > + default y if UCC_GETH > > > > + help > > > > + This option provides qe_lib support to UCC fast > > > > + protocols: HDLC, Ethernet, ATM, transparent > > > > + > > > > +config UCC > > > > + bool > > > > + default y if UCC_FAST || UCC_SLOW > > > > + > > > > +config QE_USB > > > > + bool > > > > + default y if USB_FSL_QE > > > > + help > > > > + QE USB Controller support > > > > > > First could we give these names better namespacing? > > > > Add FSL as prefix? > > Yes. If the names changed, there will be so a lot of changes. Can I send another patch to change it? > > -Scott > Regards, Zhao Qiang _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
