________________________________________ 发件人: Wood Scott-B07421 发送时间: 2014年1月8日 8:21 收件人: Tang Yuantian-B29983 抄送: ga...@kernel.crashing.org; mark.rutl...@arm.com; devicet...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org 主题: Re: [v7] clk: corenet: Adds the clock binding
On Wed, Nov 20, 2013 at 05:04:49PM +0800, tang yuantian wrote: > +Recommended properties: > +- ranges: Allows valid translation between child's address space and > + parent's. Must be present if the device has sub-nodes. > +- #address-cells: Specifies the number of cells used to represent > + physical base addresses. Must be present if the device has > + sub-nodes and set to 1 if present > +- #size-cells: Specifies the number of cells used to represent > + the size of an address. Must be present if the device has > + sub-nodes and set to 1 if present Why are we specifying #address-cells/#size-cells here? A: it has sub-nodes which have REG property, don't we need to specify #address-cells/#size-cells? > +2. Clock Provider/Consumer Binding > + > +Most of the bindings are from the common clock binding[1]. > + [1] Documentation/devicetree/bindings/clock/clock-bindings.txt > + > +Required properties: > +- compatible : Should include one of the following: > + * "fsl,qoriq-core-pll-1.0" for core PLL clocks (v1.0) > + * "fsl,qoriq-core-pll-2.0" for core PLL clocks (v2.0) > + * "fsl,qoriq-core-mux-1.0" for core mux clocks (v1.0) > + * "fsl,qoriq-core-mux-2.0" for core mux clocks (v2.0) > + * "fsl,qoriq-sysclk-1.0": for input system clock (v1.0) > + * "fsl,qoriq-sysclk-2.0": for input system clock (v2.0) Some of those lines use tabs and others spaces -- I can fix when applying. A: sorry for this and thanks for fixing. Regards, Yuantian -Scott _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
