Am 23.10.2013 um 11:20 schrieb Scott Wood <scottw...@freescale.com>:
> On Wed, Oct 23, 2013 at 09:40:02AM +0100, Paul Mackerras wrote:
>> Commit de79f7b9f6 ("powerpc: Put FP/VSX and VR state into structures")
>> modified load_up_fpu() and load_up_altivec() in such a way that they
>> now use r7 and r8. Unfortunately, the callers of these functions on
>> 32-bit machines then return to userspace via fast_exception_return,
>> which doesn't restore all of the volatile GPRs, but only r1, r3 -- r6
>> and r9 -- r12. This was causing userspace segfaults and other
>> userspace misbehaviour on 32-bit machines.
>>
>> This fixes the problem by changing the register usage of load_up_fpu()
>> and load_up_altivec() to avoid using r7 and r8 and instead use r6 and
>> r10. This also adds comments to those functions saying which registers
>> may be used.
>>
>> Signed-off-by: Paul Mackerras <pau...@samba.org>
>>
>> ---
>> arch/powerpc/kernel/fpu.S | 14 ++++++++------
>> arch/powerpc/kernel/vector.S | 15 +++++++++------
>> 2 files changed, 17 insertions(+), 12 deletions(-)
>
> Tested-by: Scott Wood <scottw...@freescale.com> (on e500mc, so no altivec)
Tested-by: Alexander Graf <ag...@suse.de> (on a G4 iBook and 970)
>
> -Scott
>
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