Hi Paul, On 07/26/2013 08:49 AM, Paul Mackerras wrote: > On Fri, Jul 26, 2013 at 08:09:23AM +0530, Preeti U Murthy wrote: >> Hi Frederic, >> >> On 07/25/2013 07:00 PM, Frederic Weisbecker wrote: >>> Hi Preeti, >>> >>> I'm not exactly sure why you can't enter the broadcast CPU in dynticks idle >>> mode. >>> I read in the previous patch that's because in dynticks idle mode the >>> broadcast >>> CPU deactivates its lapic so it doesn't receive the IPI. But may be I >>> misunderstood. >>> Anyway that's not good for powersaving. >> >> Let me elaborate. The CPUs in deep idle states have their lapics >> deactivated. This means the next timer event which would typically have >> been taken care of by a lapic firing at the appropriate moment does not >> get taken care of in deep idle states, due to the lapic being switched off. > > I really don't think it's helpful to use the term "lapic" in > connection with Power systems. There is nothing that is called a > "lapic" in a Power machine. The nearest equivalent of the LAPIC on > x86 machines is the ICP, the interrupt-controller presentation > element, of which there is one per CPU thread. > > However, I don't believe the ICP gets disabled in deep sleep modes. > What does get disabled is the "decrementer", which is a register that > normally counts down (at 512MHz) and generates an exception when it is > negative. The decrementer *is* part of the CPU core, unlike the ICP. > That's why we can still get IPIs but not timer interrupts. > > Please reword your patch description to not use the term "lapic", > which is not defined in the Power context and is therefore just > causing confusion.
Noted. Thank you :) I will probably send out a fresh patchset with the appropriate changelog to avoid this confusion ? > > Paul. > Regards Preeti U murthy _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
