The series of patches are follow-up in order to make EEH workable for PowerNV
platform on Juno-IOC-L machine. Couple of issues have been fixed with help of
Ben:
- Check PCIe link after PHB complete reset
- Restore config space for bridges
- The EEH address cache wasn't built successfully
- Misc cleanup on output messages
- Misc cleanup on EEH flags maintained by "struct pnv_phb"
- Misc cleanup on properties of functions to avoid build warnings
The series of patches have been verified on Juno-IOC-L machine:
Trigger frozen PE:
echo 0x0000000002000000 > /sys/kernel/debug/powerpc/PCI0000/err_injct
sleep 1
echo 0x0 > /sys/kernel/debug/powerpc/PCI0000/err_injct
Trigger fenced PHB:
echo 0x8000000000000000 > /sys/kernel/debug/powerpc/PCI0000/err_injct
Changelog:
==========
v2 -> v3:
* Fix overwritten buffer while collecting data
from PCI config space.
v1 -> v2:
* Remove the mechanism to block PCI-CFG and MMIO.
* Add one patch to do cleanup on output messages.
* Add one patch to avoid build warnings.
* Split functions to restore BARs for PCI devices and bridges
separately.
---
arch/powerpc/include/asm/eeh.h | 4 +-
arch/powerpc/kernel/eeh.c | 43 ++++++--
arch/powerpc/kernel/eeh_cache.c | 4 +-
arch/powerpc/kernel/eeh_pe.c | 157 ++++++++++++++++++++++++++---
arch/powerpc/platforms/powernv/eeh-ioda.c | 33 ++++---
arch/powerpc/platforms/powernv/pci-ioda.c | 1 +
arch/powerpc/platforms/powernv/pci.c | 4 +-
arch/powerpc/platforms/powernv/pci.h | 7 +-
8 files changed, 207 insertions(+), 46 deletions(-)
Thanks,
Gavin
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