On Thu, May 09, 2013 at 08:39:15AM +1000, Michael Neuling wrote: > > Just because I'm curious.. however does that happen? Surely the CPU > > knows where next to fetch instructions? > > For computed gotos (ie. branch to a register value), the hardware gives > you the from and to address in the branch history buffer. > > For branches where the branch target address is an immediate encoded in > the instruction, the hardware only logs the from address. It assumes > that software (perf irq handler in this case) can read this branch > instruction, calculate the corresponding offset and hence the > to/target address. > > It's entirely possible that when the perf IRQ handler happens, the > instruction in question is not readable or is no longer a branch (self > modifying code). Hence we aren't able to calculate a valid to address.
Ohh how cute! You've gotta love lazy hardware :-) _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
