-----Original Message----- From: Kumar Gala [mailto:ga...@kernel.crashing.org] Sent: Saturday, March 16, 2013 2:00 AM To: Leekha Shaveta-B20052 Cc: linuxppc-dev@lists.ozlabs.org; Zhao Chenhui-B35336; Li Yang-R58472; Tang Yuantian-B29983; Sethi Varun-B16395; Lian Minghuan-B31939; Mehresh Ramneek-B31383; Fleming Andy-AFLEMING Subject: Re: [PATCH 1/6] powerpc/fsl-booke: Add initial silicon device tree files for B4860QDS
On Mar 15, 2013, at 2:55 AM, Shaveta Leekha wrote: > Signed-off-by: Shaveta Leekha <shav...@freescale.com> > Signed-off-by: Zhao Chenhui <chenhui.z...@freescale.com> > Signed-off-by: Li Yang <le...@freescale.com> > Signed-off-by: Tang Yuantian <yuantian.t...@freescale.com> > Signed-off-by: Varun Sethi <varun.se...@freescale.com> > Signed-off-by: Minghuan Lian <minghuan.l...@freescale.com> > Signed-off-by: Ramneek Mehresh <ramneek.mehr...@freescale.com> > Signed-off-by: Kumar Gala <ga...@kernel.crashing.org> > Signed-off-by: Andy Fleming <aflem...@freescale.com> > --- > arch/powerpc/boot/dts/fsl/b4860si-post.dtsi | 184 +++++++++++++++++++++++++++ > arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi | 80 ++++++++++++ > 2 files changed, 264 insertions(+), 0 deletions(-) create mode 100644 > arch/powerpc/boot/dts/fsl/b4860si-post.dtsi > create mode 100644 arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi * SEC node is missing * DCSR nodes are missing. - k [SL] will add sec node, same reply for dcsr. > > diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi > b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi > new file mode 100644 > index 0000000..2db68b2 > --- /dev/null > +++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi > @@ -0,0 +1,184 @@ > +/* > + * B4860 Silicon/SoC Device Tree Source (post include) > + * > + * Copyright 2012 Freescale Semiconductor Inc. > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions are > met: > + * * Redistributions of source code must retain the above copyright > + * notice, this list of conditions and the following disclaimer. > + * * Redistributions in binary form must reproduce the above copyright > + * notice, this list of conditions and the following disclaimer in the > + * documentation and/or other materials provided with the distribution. > + * * Neither the name of Freescale Semiconductor nor the > + * names of its contributors may be used to endorse or promote products > + * derived from this software without specific prior written > permission. > + * > + * > + * ALTERNATIVELY, this software may be distributed under the terms of > +the > + * GNU General Public License ("GPL") as published by the Free > +Software > + * Foundation, either version 2 of that License or (at your option) > +any > + * later version. > + * > + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND > +ANY > + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE > +IMPLIED > + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE > +ARE > + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE > +FOR ANY > + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL > +DAMAGES > + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR > +SERVICES; > + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER > +CAUSED AND > + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, > +OR TORT > + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE > +USE OF THIS > + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > + */ > + > +&ifc { > + #address-cells = <2>; > + #size-cells = <1>; > + compatible = "fsl,ifc", "simple-bus"; > + interrupts = <25 2 0 0>; > +}; > + > +/* controller at 0x200000 */ > +&pci0 { > + compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4"; > + device_type = "pci"; > + #size-cells = <2>; > + #address-cells = <3>; > + bus-range = <0x0 0xff>; > + interrupts = <20 2 0 0>; > + pcie@0 { > + #interrupt-cells = <1>; > + #size-cells = <2>; > + #address-cells = <3>; > + device_type = "pci"; > + interrupts = <20 2 0 0>; > + interrupt-map-mask = <0xf800 0 0 7>; > + interrupt-map = < > + /* IDSEL 0x0 */ > + 0000 0 0 1 &mpic 40 1 0 0 > + 0000 0 0 2 &mpic 1 1 0 0 > + 0000 0 0 3 &mpic 2 1 0 0 > + 0000 0 0 4 &mpic 3 1 0 0 > + >; > + }; > +}; > + > +&rio { > + compatible = "fsl,srio"; > + interrupts = <16 2 1 11>; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + port1 { > + #address-cells = <2>; > + #size-cells = <2>; > + cell-index = <1>; > + }; > + > + port2 { > + #address-cells = <2>; > + #size-cells = <2>; > + cell-index = <2>; > + }; > +}; > + > +&soc { > + #address-cells = <1>; > + #size-cells = <1>; > + device_type = "soc"; > + compatible = "simple-bus"; > + > + soc-sram-error { > + compatible = "fsl,soc-sram-error"; > + interrupts = <16 2 1 2>; > + }; > + > + corenet-law@0 { > + compatible = "fsl,corenet-law"; > + reg = <0x0 0x1000>; > + fsl,num-laws = <32>; > + }; > + > + ddr1: memory-controller@8000 { > + compatible = "fsl,qoriq-memory-controller-v4.5", > "fsl,qoriq-memory-controller"; > + reg = <0x8000 0x1000>; > + interrupts = <16 2 1 8>; > + }; > + > + ddr2: memory-controller@9000 { > + compatible = > "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller"; > + reg = <0x9000 0x1000>; > + interrupts = <16 2 1 9>; > + }; > + > + cpc: l3-cache-controller@10000 { > + compatible = "fsl,p5020-l3-cache-controller", > "fsl,p4080-l3-cache-controller", "cache"; > + reg = <0x10000 0x1000 > + 0x11000 0x1000>; > + interrupts = <16 2 1 4 > + 16 2 1 5>; > + }; > + > + corenet-cf@18000 { > + compatible = "fsl,corenet-cf"; > + reg = <0x18000 0x1000>; > + interrupts = <16 2 1 0>; > + fsl,ccf-num-csdids = <32>; > + fsl,ccf-num-snoopids = <32>; > + }; > + > + iommu@20000 { > + compatible = "fsl,pamu-v1.0", "fsl,pamu"; > + reg = <0x20000 0x4000>; > + interrupts = < > + 24 2 0 0 > + 16 2 1 1>; > + }; > + > +/include/ "qoriq-mpic.dtsi" > + > + guts: global-utilities@e0000 { > + compatible = "fsl,b4860-device-config"; > + reg = <0xe0000 0xe00>; > + fsl,has-rstcr; > + fsl,liodn-bits = <12>; > + }; > + > + clockgen: global-utilities@e1000 { > + compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2"; > + reg = <0xe1000 0x1000>; > + }; > + > + rcpm: global-utilities@e2000 { > + compatible = "fsl,b4860-rcpm", "fsl,qoriq-rcpm-2"; > + reg = <0xe2000 0x1000>; > + }; > + > +/include/ "qoriq-dma-0.dtsi" > +/include/ "qoriq-dma-1.dtsi" > + > +/include/ "qonverge-usb2-dr-0.dtsi" > + usb0: usb@210000 { > + compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr"; > + }; > + > +/include/ "qoriq-espi-0.dtsi" > + spi@110000 { > + fsl,espi-num-chipselects = <4>; > + }; > + > +/include/ "qoriq-esdhc-0.dtsi" > + sdhc@114000 { > + sdhci,auto-cmd12; > + }; > +/include/ "qoriq-i2c-0.dtsi" > +/include/ "qoriq-i2c-1.dtsi" > +/include/ "qoriq-duart-0.dtsi" > +/include/ "qoriq-duart-1.dtsi" > + > + L2: l2-cache-controller@c20000 { > + next-level-cache = <&cpc>; should have compatible & reg nodes [SL] agree. Will add > + }; > +}; [ snip ] - k Regards, Shaveta _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev