Benh, Here are a few fixes for the POWER8 (Performance Optimization With Enhanced RISC Eight) FSCR (Facility Status & Control Register).
First patch changes the FSCR so that it's set on secondary CPUs as well as when MSR HV=0. Second two patches make sure that the FSCR DSCR (Data Stream Control Register) bit is set so that we don't trap on DSCR usage. These are aimed to fix issues in 3.9. v2: Addressing comments from benh (Benjamin Herrenschmidt) Mikey _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
