"Aneesh Kumar K.V" <aneesh.ku...@linux.vnet.ibm.com> writes:
> Phileas Fogg <phileas-f...@mail.ru> writes: > >> And another note. >> I took a look at the MMU chapter in the Cell Architecture handbook and >> indeed the first 15 bits in VA are treated as 0 by the hardware. >> >> Quote: >> >> 1. High-order bits above 65 bits in the 80-bit virtual address (VA[0:14]) >> are not implemented. The hardware always >> treats these bits as `0'. Software must not set these bits to any other >> value than `0' or the results are undefined in >> the PPE. >> >> > > True, we missed the below part of ISA doc: > > ISA doc says > > "On implementations that support a virtual address size > of only n bits, n < 78, bits 0:77-n of the AVA field must be > zeros. " > > The Cell document I found at > > https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/7A77CCDF14FE70D5852575CA0074E8ED/$file/CellBE_Handbook_v1.12_3Apr09_pub.pdf > > gives > > Virtual Address (VA) Size -> 65 bits > > So as per ISA, bits 0:12 should be zero, which should make 0:14 of PTE > fields zero for Cell. > > I will try to do a patch. > Can you try this patch ? diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h index 2fdb47a..f01fd9a 100644 --- a/arch/powerpc/include/asm/mmu-hash64.h +++ b/arch/powerpc/include/asm/mmu-hash64.h @@ -381,21 +381,37 @@ extern void slb_set_size(u16 size); * hash collisions. */ +/* This should go in Kconfig */ +/* + * Be careful with this value. This determines the VSID_MODULUS_* and that + * need to be co-prime with VSID_MULTIPLIER* + */ +#if 1 +#define MAX_VIRTUAL_ADDR_BITS 65 +#else +#define MAX_VIRTUAL_ADDR_BITS 66 +#endif +/* + * One bit is taken by the kernel, only the rest of space is available for the + * user space. + */ +#define CONTEXT_BITS (MAX_VIRTUAL_ADDR_BITS - \ + (USER_ESID_BITS + SID_SHIFT + 1)) +#define USER_ESID_BITS 18 +#define USER_ESID_BITS_1T 6 + /* * This should be computed such that protovosid * vsid_mulitplier * doesn't overflow 64 bits. It should also be co-prime to vsid_modulus */ #define VSID_MULTIPLIER_256M ASM_CONST(12538073) /* 24-bit prime */ -#define VSID_BITS_256M 38 +#define VSID_BITS_256M (CONTEXT_BITS + USER_ESID_BITS + 1) #define VSID_MODULUS_256M ((1UL<<VSID_BITS_256M)-1) #define VSID_MULTIPLIER_1T ASM_CONST(12538073) /* 24-bit prime */ -#define VSID_BITS_1T 26 +#define VSID_BITS_1T (CONTEXT_BITS + USER_ESID_BITS_1T + 1) #define VSID_MODULUS_1T ((1UL<<VSID_BITS_1T)-1) -#define CONTEXT_BITS 19 -#define USER_ESID_BITS 18 -#define USER_ESID_BITS_1T 6 #define USER_VSID_RANGE (1UL << (USER_ESID_BITS + SID_SHIFT)) _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
