On 02/01/2013 06:06:05 AM, Thomas Waldecker wrote:
Hi,
As part of my masterthesis I was just looking around the kernel
sources for cpuidle and figured out that the only CPU in the PowerPC
architecture using the cpuidle framework is the pseries.
I assume the e500v2 core is using the idle modes
in arch/powerpc/kernel/idle_e500.S
Why is there no support for the cpuidle framework?
Because nobody implemented it. :-)
The only reason I can think of to implement it on this chip would be to
dynamically choose when to enter nap versus doze, rather than always
just using doze. It's not clear whether the difference in power
savings is worth it -- do you have any way of measuring?
How can I debug the e500 idle modes?
Are there any statistics?
Top reports idle percentage...
I already ran PowerTOP on a QorIQ P2020 but it's almost useless
because the information is missing.
What information are you looking for?
-Scott
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