Jimi Xenidis <ji...@pobox.com> wrote: > > > On Dec 9, 2012, at 6:47 PM, Michael Neuling <mi...@neuling.org> wrote: > > > Jimi Xenidis <ji...@pobox.com> wrote: > > > >> > >> On Dec 7, 2012, at 7:38 AM, Jimi Xenidis <ji...@pobox.com> wrote: > >> > >>> > >>> On Dec 6, 2012, at 11:54 PM, Michael Neuling <mi...@neuling.org> wrote: > >>> > >>>>> commit 279c0615917b959a652e81f4ad0d886e2d426d85 > >>>>> Author: Jimi Xenidis <ji...@pobox.com> > >>>>> Date: Wed Dec 5 13:43:22 2012 -0500 > >>>>> > >>>>> powerpc/book3e: IBM Blue Gene/Q Quad Processing eXtention (QPX) > >>>>> > >>>>> This enables kernel support for the QPX extention and is intended for > >>>>> processors that support it, usually an IBM Blue Gene processor. > >>>>> Turning it on does not effect other processors but it does add code > >>>>> and will quadruple the per thread save and restore area for the FPU > >>>>> (hense the name). If you have enabled VSX it will only double the > >>>>> space. > >>>>> > >>>>> Signed-off-by: Jimi Xenidis <ji...@pobox.com> > >> > >> <<snip>> > >>>> > >>>> > >>>> > >>>> +BEGIN_FTR_SECTION \ > >>>> + SAVE_32VSRS(n,c,base); \ > >>>> +END_FTR_SECTION_IFSET(CPU_FTR_VSX); \ > >>>> +BEGIN_FTR_SECTION \ > >>>> + SAVE_32QRS(n,c,base); \ > >>>> +END_FTR_SECTION_IFSET(CPU_FTR_QPX); > >>>> > >>>> I don't think we want to do this. We are going to end up with 64 > >>>> NOPS here somewhere. > >>> > >>> Excellent point, NOPs are cheap on most processors but not A2 and a lot > >>> of embedded, I can wrap some branches with the FTR instead. > >>> Do you have a concern on the code size? > >> > >> Thought about it a bit and came up with this solution for > >> arch/powerpc/kernel/fpu.S. > >> This should address the following issues > >> - MSR_VSX vs MSR_VEC > >> - Big chunks of NOPs in the code path > >> - Less FTR space fixups at boot time. > >> - IMNHSO easier to read especially when disassembled > > > > Indeed, I think it looks better. I was going to mention that it was > > already pretty complex to read, so a rewrite like this was probably > > needed. So thanks!! > > > > That being said, there is a pretty complex testing matrix of > > CONFIG_VSX/VMX/FPU/QPX/SMP/64/32 CPU_FTR/VSX/FPU/QPX/VMX so I'd need to > > look/test more carefully to make sure all of these are covered. > > > > Also, transactional memory (see > > http://lists.ozlabs.org/pipermail/linuxppc-dev/2012-November/102216.html) > > will change this code. You should rebase on top of that if you really > > want it considered for upstream. > > Is this in a git tree anywhere? perhaps BenH's next branch?
It's not in benh's tree as yet (so could change). Grab the power8 branch here git://github.com/mikey/linux.git or checkout https://github.com/mikey/linux/commits/power8. It's about 20 patches on top of benh's next tree. Also includes the power8 doorbell changes from Ian. Mikey _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
