Support for stalled-cycles-frontend and stalled-cycles-backend is
added for e500-based processors.
The following mappings are used:
stalled-cycles-frontend or idle-cycles-frontend:
Com:18 Cycles decode stalled
stalled-cycles-backend or idle-cycles-backend
Com:19 cycles issue stalled
Signed-off-by: Chris Freehill <chr...@freescale.com>
---
arch/powerpc/perf/e500-pmu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/perf/e500-pmu.c b/arch/powerpc/perf/e500-pmu.c
index cb2e294..fb66492 100644
--- a/arch/powerpc/perf/e500-pmu.c
+++ b/arch/powerpc/perf/e500-pmu.c
@@ -24,6 +24,8 @@ static int e500_generic_events[] = {
[PERF_COUNT_HW_CACHE_MISSES] = 41, /* Data L1 cache reloads */
[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 12,
[PERF_COUNT_HW_BRANCH_MISSES] = 15,
+ [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 18,
+ [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 19,
};
#define C(x) PERF_COUNT_HW_CACHE_##x
--
1.7.9.5
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