Segher Boessenkool <seg...@kernel.crashing.org> wrote: > > --- a/arch/powerpc/include/asm/reg.h > > +++ b/arch/powerpc/include/asm/reg.h > > @@ -249,6 +249,8 @@ > > #define LPCR_RMLS 0x1C000000 /* impl dependent rmo limit sel */ > > #define LPCR_RMLS_SH (63-37) > > #define LPCR_ILE 0x02000000 /* !HV irqs set MSR:LE */ > > +#define LPCR_AIL_0 0x00000000 /* MMU off IRQ location 0x0 */ > > +#define LPCR_AIL_3 0x01800000 /* MMU on IRQ location > > 0xc00...4xxx */ > > s/IRQ location/exception offset/ ?
Sure, updated. > > > --- a/arch/powerpc/kernel/cpu_setup_power.S > > +++ b/arch/powerpc/kernel/cpu_setup_power.S > > @@ -54,6 +54,7 @@ _GLOBAL(__setup_cpu_power8) > > li r0,0 > > mtspr SPRN_LPID,r0 > > mfspr r3,SPRN_LPCR > > + oris r3, r3, LPCR_AIL_3@h > > Is the AIL field only two bits? If not, you probably want to clear > the other bits. Yes it only 2 bits. > This series looks really nice btw :-) Cheers, Mikey _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
