> -----Original Message----- > From: Kumar Gala [mailto:ga...@kernel.crashing.org] > Sent: Thursday, October 04, 2012 6:47 PM > To: Sethi Varun-B16395 > Cc: joerg.roe...@amd.com; io...@lists.linux-foundation.org; linuxppc- > d...@lists.ozlabs.org; linux-ker...@vger.kernel.org; Sethi Varun-B16395 > Subject: Re: [PATCH 2/3 v2] iommu/fsl: Add iommu domain attributes > required by fsl PAMU driver. > > > On Oct 4, 2012, at 6:56 AM, <b16...@freescale.com> <b16...@freescale.com> > wrote: > > > From: Varun Sethi <varun.se...@freescale.com> > > > > Added the following domain attributes required by FSL PAMU driver: > > 1. Subwindows field added to the iommu domain geometry attribute. > > 2. Added new iommu stash attribute, which allows setting of the > > LIODN specific stash id parameter through IOMMU API. > > 3. Added an attribute for enabling/disabling DMA to a particular > > memory window. > > > > Signed-off-by: Varun Sethi <varun.se...@freescale.com> > > --- > > include/linux/iommu.h | 35 +++++++++++++++++++++++++++++++++++ > > 1 files changed, 35 insertions(+), 0 deletions(-) > > > > diff --git a/include/linux/iommu.h b/include/linux/iommu.h index > > f3b99e1..62e22f0 100644 > > --- a/include/linux/iommu.h > > +++ b/include/linux/iommu.h > > @@ -44,6 +44,33 @@ struct iommu_domain_geometry { > > dma_addr_t aperture_start; /* First address that can be mapped > */ > > dma_addr_t aperture_end; /* Last address that can be mapped > */ > > bool force_aperture; /* DMA only allowed in mappable range? > */ > > + > > + /* The subwindows field indicates number of DMA subwindows > supported > > + * by the geometry. Following is the interpretation of > > + * values for this field: > > + * 0 : This implies that the supported geometry size is 1 MB > > + * with each subwindow size being 4KB. Thus number of > subwindows > > + * being = 1MB/4KB = 256. > > + * 1 : Only one DMA window i.e. no subwindows. > > + * value other than 0 or 1 would indicate actual number of > subwindows. > > + */ > > + u32 subwindows; > > +}; > > + > > +/* cache stash targets */ > > +#define L1_CACHE 1 > > +#define L2_CACHE 2 > > +#define L3_CACHE 3 > > These names are way to generic for being exposed to user space Will fix naming to IOMMU_ATTR_CACHE_L1 etc.
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