On Aug 3, 2012, at 11:44 AM, Scott Wood wrote: > On 08/03/2012 08:19 AM, Kumar Gala wrote: >> >> On Jul 31, 2012, at 9:42 AM, Varun Sethi wrote: >>> + /* ioremap'ed base for error interrupt registers */ >>> + u32 __iomem *err_regs; >>> + /* error interrupt config */ >>> + u32 err_int_config_done; >>> + >> >> Is this really needed ? > > Probably a left over from when it was done on demand. > >> >>> /* Protected sources */ >>> unsigned long *protected; >>> >>> @@ -370,6 +381,8 @@ struct mpic >>> #define MPIC_NO_RESET 0x00004000 >>> /* Freescale MPIC (compatible includes "fsl,mpic") */ >>> #define MPIC_FSL 0x00008000 >>> +/* Freescale MPIC supports EIMR (error interrupt mask register)*/ >>> +#define MPIC_FSL_HAS_EIMR 0x00010000 >> >> Can't we use BRR for this? > > BRR is used, and this is set as a result. Better than opencoding a BRR > check a bunch of places...
I'm fine w/that, but didn't see where MPIC_FSL_HAS_EMIR was being set.. Just want to avoid the caller of mpic_alloc() having to pass it in. - k _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
