> -----Original Message----- > From: Kumar Gala [mailto:ga...@kernel.crashing.org] > Sent: Tuesday, July 31, 2012 10:31 PM > To: Wang Dongsheng-B40534 > Cc: b...@kernel.crashing.org; pau...@samba.org; Wood Scott-B07421; > linuxppc-dev@lists.ozlabs.org > Subject: Re: [PATCH] powerpc/fsl: mpic timer driver > > > On Jul 31, 2012, at 2:58 AM, Wang Dongsheng-B40534 wrote: > > > > > > >> -----Original Message----- > >> From: Kumar Gala [mailto:ga...@kernel.crashing.org] > >> Sent: Friday, July 27, 2012 9:14 PM > >> To: Wang Dongsheng-B40534 > >> Cc: b...@kernel.crashing.org; pau...@samba.org; Wood Scott-B07421; > >> linuxppc-dev@lists.ozlabs.org > >> Subject: Re: [PATCH] powerpc/fsl: mpic timer driver > >> > >> > >> On Jul 27, 2012, at 1:20 AM, <dongsheng.w...@freescale.com> > >> <dongsheng.w...@freescale.com> wrote: > >> > >>> From: Wang Dongsheng <dongsheng.w...@freescale.com> > >>> > >>> Global timers A and B internal to the PIC. The two independent > >>> groups of global timer, group A and group B, are identical in their > >> functionality. > >>> The hardware timer generates an interrupt on every timer cycle. > >>> e.g > >>> Power management can use the hardware timer to wake up the machine. > >>> > >>> Signed-off-by: Wang Dongsheng <dongsheng.w...@freescale.com> > >>> Signed-off-by: Li Yang <le...@freescale.com> > >> > >> How much of this is FSL specific vs openpic? OpenPIC spec's timer > >> support (only a single group). > >> > > [Wang Dongsheng] Yes, OpenPIC only a single group timer. > > FSL: add more register, features and group. > > This patch only to support FSL chip. > > "mpic_timer.c" -> "fsl_mpic_timer.c" > > I will modify the description of the patch. how about? > > I'd rather we support both, can we not use the MPIC_FSL flag to deal with > FSL specific behavior? > [Wang Dongsheng] This patch, most of them are done processing cascade mode. Cascade is a FSL chip function. I think this patch is very targeted. I think that the patch only supports FSL chip.
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