On Jul 20, 2012, at 7:42 AM, Zhao Chenhui wrote: > Add support to disable and re-enable individual cores at runtime > on MPC85xx/QorIQ SMP machines. Currently support e500v1/e500v2 core. > > MPC85xx machines use ePAPR spin-table in boot page for CPU kick-off. > This patch uses the boot page from bootloader to boot core at runtime. > It supports 32-bit and 36-bit physical address. > > Signed-off-by: Li Yang <le...@freescale.com> > Signed-off-by: Jin Qing <b24...@freescale.com> > Signed-off-by: Zhao Chenhui <chenhui.z...@freescale.com> > --- > arch/powerpc/Kconfig | 6 ++- > arch/powerpc/include/asm/cacheflush.h | 2 + > arch/powerpc/include/asm/smp.h | 1 + > arch/powerpc/kernel/head_fsl_booke.S | 28 ++++++++++ > arch/powerpc/platforms/85xx/smp.c | 90 ++++++++++++++++++++++++++++----- > 5 files changed, 112 insertions(+), 15 deletions(-)
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