For the 64 bit case separate out e5500 cpu_setup and cpu_restore functions.
The cpu_setup function (for the primary core) is passed the cpu_spec pointer,
which is not there in case of the cpu_restore function. Also, in our case
we will have to manipulate the CPU_FTR_EMB_HV flag on the the primary core.  

Signed-off-by: Varun Sethi <varun.se...@freescale.com>
---
 arch/powerpc/kernel/cpu_setup_fsl_booke.S |   38 ++++++++++++++++++++++++----
 arch/powerpc/kernel/exceptions-64e.S      |   18 +------------
 2 files changed, 34 insertions(+), 22 deletions(-)

diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S 
b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 5e87737..1345e1b 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -105,19 +105,45 @@ _GLOBAL(__setup_cpu_e5500)
        mtlr    r5
        blr
 #endif
-/* Right now, restore and setup are the same thing */
+
+#ifdef CONFIG_PPC_BOOK3E_64
 _GLOBAL(__restore_cpu_e5500)
-_GLOBAL(__setup_cpu_e5500)
        mflr    r4
        bl      __e500_icache_setup
        bl      __e500_dcache_setup
-#ifdef CONFIG_PPC_BOOK3E_64
        bl      .__setup_base_ivors
        bl      .setup_perfmon_ivor
        bl      .setup_doorbell_ivors
+       /*
+        * We only want to touch IVOR38-41 if we're running on hardware
+        * that supports category E.HV.  The architectural way to determine
+        * this is MMUCFG[LPIDSIZE].
+        */
+       mfspr   r10,SPRN_MMUCFG
+       rlwinm. r10,r10,0,MMUCFG_LPIDSIZE
+       beq     1f
        bl      .setup_ehv_ivors
-#else
-       bl      __setup_e500mc_ivors
-#endif
+1:
        mtlr    r4
        blr
+
+_GLOBAL(__setup_cpu_e5500)
+       mflr    r5
+       bl      __e500_icache_setup
+       bl      __e500_dcache_setup
+       bl      .__setup_base_ivors
+       bl      .setup_perfmon_ivor
+       bl      .setup_doorbell_ivors
+       /*
+        * We only want to touch IVOR38-41 if we're running on hardware
+        * that supports category E.HV.  The architectural way to determine
+        * this is MMUCFG[LPIDSIZE].
+        */
+       mfspr   r10,SPRN_MMUCFG
+       rlwinm. r10,r10,0,MMUCFG_LPIDSIZE
+       beq     1f
+       bl      .setup_ehv_ivors
+1:
+       mtlr    r5
+       blr
+#endif
diff --git a/arch/powerpc/kernel/exceptions-64e.S 
b/arch/powerpc/kernel/exceptions-64e.S
index 7215cc2..5f9ef1b 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -1302,25 +1302,11 @@ _GLOBAL(setup_perfmon_ivor)
 _GLOBAL(setup_doorbell_ivors)
        SET_IVOR(36, 0x280) /* Processor Doorbell */
        SET_IVOR(37, 0x2a0) /* Processor Doorbell Crit */
-
-       /* Check MMUCFG[LPIDSIZE] to determine if we have category E.HV */
-       mfspr   r10,SPRN_MMUCFG
-       rlwinm. r10,r10,0,MMUCFG_LPIDSIZE
-       beqlr
-
-       SET_IVOR(38, 0x2c0) /* Guest Processor Doorbell */
-       SET_IVOR(39, 0x2e0) /* Guest Processor Doorbell Crit/MC */
        blr
 
 _GLOBAL(setup_ehv_ivors)
-       /*
-        * We may be running as a guest and lack E.HV even on a chip
-        * that normally has it.
-        */
-       mfspr   r10,SPRN_MMUCFG
-       rlwinm. r10,r10,0,MMUCFG_LPIDSIZE
-       beqlr
-
        SET_IVOR(40, 0x300) /* Embedded Hypervisor System Call */
        SET_IVOR(41, 0x320) /* Embedded Hypervisor Privilege */
+       SET_IVOR(38, 0x2c0) /* Guest Processor Doorbell */
+       SET_IVOR(39, 0x2e0) /* Guest Processor Doorbell Crit/MC */
        blr
-- 
1.7.4.1


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