This TDM controller is available in various Freescale SOCs like MPC8315, P1020,
P1022, P1010.
Signed-off-by: Sandeep Singh <sand...@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggr...@freescale.com>
---
Changes in v2:
- Incorporated Scott's Review comments
Documentation/devicetree/bindings/tdm/fsl-tdm.txt | 67 +++++++++++++++++++++
1 files changed, 67 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/tdm/fsl-tdm.txt
diff --git a/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
b/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
new file mode 100644
index 0000000..6553dbe
--- /dev/null
+++ b/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
@@ -0,0 +1,67 @@
+=====================================================================
+TDM Device Tree Binding
+Copyright (C) 2012 Freescale Semiconductor Inc.
+
+NOTE: The bindings described in this document are preliminary
+and subject to change.
+
+=====================================================================
+TDM (Time Division Multiplexing)
+
+DESCRIPTION
+
+The TDM is full duplex serial port designed to allow various devices including
+digital signal processors (DSPs) to communicate with a variety of serial
devices
+including industry standard framers, codecs, other DSPs and microprocessors.
+
+The below properties describe the device tree bindings for Freescale TDM
+controller.
+This TDM controller is available on various Freescale Processors like
+MPC8315, P1020, P1022 and P1010.
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should contain "fsl,mpc8315-tdm".
+ So mpc8315 will have compatible = "fsl,mpc8315-tdm";
+ p1010 will have compatible "fsl,p1010-tdm", "fsl,mpc8315-tdm";
+
+ - reg
+ Usage: required
+ Definition: There are two reg resources. First is for TDM registers and
+ the second for TDM DMAC registers.
+
+ - clock-frequency
+ Usage: optional
+ Value type: <u32>
+ Definition: The frequency at which the TDM block is operating.
+
+ - interrupts
+ Usage: required
+ Definition: This field defines the interrupt specifiers for the two
+ interrupts. First is for TDM error and second for TDM DMAC.
+
+ - phy-handle
+ Usage: optional
+ Value type: <phandle>
+ Definition: Phandle of the line controller node or framer node eg. SLIC,
+ E1/T1 etc.
+
+ - fsl,max-time-slots
+ Usage: required
+ Value type: <u32>
+ Definition: Maximum number of 8-bit time slots in one TDM frame.
+ This is the maximum number which TDM hardware supports.
+
+EXAMPLE
+
+ tdm@16000 {
+ compatible = "fsl,p1010-tdm", "fsl,mpc8315-tdm";
+ reg = <0x16000 0x200 0x2c000 0x2000>;
+ clock-frequency = <399999999>; /* typically filled by u-boot */
+ interrupts = <16 8 62 8>;
+ phy-handle = <&zarlink1>;
+ fsl-max-time-slots = <128>;
+ };
--
1.6.5.6
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