On Mar 14, 2012, at 5:15 AM, Zhao Chenhui wrote: > From: chenhui zhao <chenhui.z...@freescale.com> > > There is a PCI bridge(Tsi310) between the MPC8548 and a VIA > southbridge chip. > > The bootloader sets the PCI bridge to open a window from 0x0000 > to 0x1fff on the PCI I/O space. But the kernel can't set the I/O > resource. In the routine pci_read_bridge_io(), if the base which > is read from PCI_IO_BASE is equal to zero, the routine don't set > the I/O resource of the child bus. > > To allow the legacy I/O space on the VIA southbridge to be accessed, > use the fixup to fix the PCI I/O space of the PCI bridge. > > Signed-off-by: Zhao Chenhui <chenhui.z...@freescale.com> > Signed-off-by: Li Yang <le...@freescale.com> > --- > Changes for v2: > * merge patch 1/9 and 2/9 > * rename PCI_DEVICE_ID_IBM_PCIX_BRIDGE to PCI_DEVICE_ID_IDT_TSI310
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