Arshad, Farrukh wrote: > How can I verify if the memory mapped is coherent on both cores. My memory > partitioning is given below > > Core Base Address Size > Core 0 0x0000,0000 0x1000,0000 --> > CONFIG_PHYSICAL_START = bootm_low = Base Address > Core 1 0x1000,0000 0x0C00,0000 --> > CONFIG_PHYSICAL_START = bootm_low = Base Address > Shared Mem 0x1C00,0000 0x0400,0000
Was the kernel option, CONFIG_SMP, enabled for both two kernels? CONFIG_SMP would affect the memory attribute for cache coherency. Maybe you should make sure if kernel have a appropriate memory attribute by dumping TLB entry. Tiejun > > Regards, > Farrukh Arshad > > -----Original Message----- > From: Scott Wood [mailto:scottw...@freescale.com] > Sent: Tuesday, January 03, 2012 10:10 PM > To: Arshad, Farrukh > Cc: linuxppc-dev@lists.ozlabs.org > Subject: Re: Problem in getting shared memory access on P1022RDK > > On 01/03/2012 03:42 AM, Arshad, Farrukh wrote: >> Adding more to it, >> >> >> >> When I write from Core 1 on the shared memory region it is visible at >> Core 0 and it can read what I have written from Core 1 but when I >> write from Core 0 on this shared memory it is not visible on Core 1. > > Is the memory mapped coherent on both cores? > > -Scott _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
