On Jun 28, 2011, at 2:52 AM, Mingkai Hu wrote: > P2040RDB Specification: > ----------------------- > 2Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus) > 128 Mbyte NOR flash single-chip memory > 256 Kbit M24256 I2C EEPROM > 16 Mbyte SPI memory > SD connector to interface with the SD memory card > dTSEC1: connected to the Vitesse SGMII PHY (VSC8221) > dTSEC2: connected to the Vitesse SGMII PHY (VSC8221) > dTSEC3: connected to the Vitesse SGMII PHY (VSC8221) > dTSEC4: connected to the Vitesse RGMII PHY (VSC8641) > dTSEC5: connected to the Vitesse RGMII PHY (VSC8641) > I2C1: Real time clock, Temperature sensor > I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM > SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors > UART: supports two UARTs up to 115200 bps for console > USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces > PCIe: > - Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1 > - Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2 > > Signed-off-by: Mingkai Hu <mingkai...@freescale.com> > --- > Based on http://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git > > arch/powerpc/boot/dts/p2040rdb.dts | 166 +++++++ > arch/powerpc/boot/dts/p2040si.dtsi | 623 ++++++++++++++++++++++++++ > arch/powerpc/configs/corenet32_smp_defconfig | 1 + > arch/powerpc/platforms/85xx/Kconfig | 12 + > arch/powerpc/platforms/85xx/Makefile | 1 + > arch/powerpc/platforms/85xx/p2040_rdb.c | 88 ++++ > 6 files changed, 891 insertions(+), 0 deletions(-) > create mode 100644 arch/powerpc/boot/dts/p2040rdb.dts > create mode 100644 arch/powerpc/boot/dts/p2040si.dtsi > create mode 100644 arch/powerpc/platforms/85xx/p2040_rdb.c
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