IRQ assignments for MPC8641D are "virtual", meaning "made up" and quite
difficult to determine by looking through code.
But I believe the plan goes something like this:
IRQ
---------
0 No interrupt
1 - 15 External interrupts (only 1..12 would be used)
16 - 127 Internal interrupts - see Table 9-2 of 8641D ref man,
Add 15 to the numbers shown
128 - 255 Yours, or your BSP's, to do with as you like
256 - 511 Message Signaled Interrupts
If you look in the sample device trees for 8641 cards you'll see that
the interrupt values cited there for various devices match the 16..127
group above.
> -----Original Message-----
> From: linuxppc-dev-bounces+tanderson=curtisswright....@lists.ozlabs.org
> [mailto:linuxppc-dev-
> bounces+tanderson=curtisswright....@lists.ozlabs.org] On Behalf Of
> david.hag...@gmail.com
> Sent: Tuesday, September 21, 2010 7:12 AM
> To: linuxppc-dev@lists.ozlabs.org
> Subject: Questions on interrupt vector assignment on MPC8641D
>
> I'm new to developing on the PPC (most of my experience is on x86), and I
> have a couple of questions about mapping of interrupts on the PPC,
> specifically on the Freescale 8641D embedded CPU.
>
> 1) How does one allocate interrupt vectors for the embedded devices, such
> as the MPIC? All the kernel how-tos are really targeting the x86 and PCI,
> so I've been unable to find a good document on "that which is not an X86".
>
> 2) Are there any good guides to programming the PPC generally, and the
> MPC8641 specifically, that I can go read to answer my other questions?
>
> I'm trying to write a driver to map the 8641D's PCIe controllers *as
> endpoints* into something frobablbe from user space - to allow setting the
> BARs and outbound address translation units via sysfs files, and to allow
> mapping of inbound interrupts to sysfs "doorbell"-style files. If I can
> get it worked out I want to submit it back to the kernel for general
> distribution.
>
> If anybody has any insights, I'd greatly appreciate it if you'd copy my
> work email (david.hagood at aeroflex.com) as well (I am using my personal
> email as work insisted upon adding a one paragraph "wart" to all outbound
> email that isn't acceptable for a list like this.)
>
> Also, if anybody out there has experience with the 8641D PEX's in endpoint
> mode and wouldn't mind answering a couple of questions about programming
> the OWBARs, I'd be greatly obliged.
>
>
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
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