>
> + soc8...@e0000000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + device_type = "soc";
> + compatible = "simple-bus";
> + ranges = <0x0 0xe0000000 0x100000>;
> + bus-frequency = <0>;
> +
> + ecm-...@0 {
> + compatible = "fsl,ecm-law";
> + reg = <0x0 0x1000>;
> + fsl,num-laws = <8>;
> + };
> +
> + e...@1000 {
> + compatible = "fsl,mpc8555-ecm", "fsl,ecm";
> + reg = <0x1000 0x1000>;
> + interrupts = <17 2>;
> + interrupt-parent = <&mpic>;
> + };
> +
> + memory-control...@2000 {
> + compatible = "fsl,8555-memory-controller";
fsl,mpc8555?
> + reg = <0x2000 0x1000>;
> + interrupt-parent = <&mpic>;
> + interrupts = <18 2>;
> + };
> +
> + L2: l2-cache-control...@20000 {
fsl,mpc8555?
> + compatible = "fsl,8555-l2-cache-controller";
> + reg = <0x20000 0x1000>;
> + cache-line-size = <32>; // 32 bytes
> + cache-size = <0x40000>; // L2, 256K
> + interrupt-parent = <&mpic>;
> + interrupts = <16 2>;
> + };
> +
- k
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