The current code that determines which bank/chipselect is used for a
given NAND instance only worked for 32-bit addresses and assumed
a 1:1 mapping. This breaks in 36-bit physical configs.
Signed-off-by: Poonam Aggrwal <poonam.aggr...@freescale.com>
Acked-by: Scott Wood <scottw...@freescale.com>
---
Tested on P2020RDB and P1020RDB platforms.
drivers/mtd/nand/fsl_elbc_nand.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index 09228c6..a9b0cfa 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -853,7 +853,7 @@ static int __devinit fsl_elbc_nand_probe(struct of_device
*dev,
(in_be32(&lbc->bank[bank].br) & BR_MSEL) == BR_MS_FCM &&
(in_be32(&lbc->bank[bank].br) &
in_be32(&lbc->bank[bank].or) & BR_BA)
- == res.start)
+ == (u32)res.start)
break;
if (bank >= MAX_BANKS) {
--
1.5.6.5
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