Although I haven't used scc port as uart, I think your smc1 part in your dts
file maybe is wrong.
ser...@11a82 { ...
reg = <0x11a80 0x20 0x87fc 2>;
should be:
reg = <0x11a80 0x20 XXX 40>;
XXX is the value which is set at 0x87fc in your bootloader.
I just got this mistake a few days ago.
----- Original Message -----
From: "Martyn Welch" <martyn.we...@ge.com>
To: "linuxppc-dev list" <linuxppc-...@ozlabs.org>
Sent: Wednesday, June 09, 2010 10:37 PM
Subject: CPM UART on MPC8270
> Hi All,
>
> I'm attempting to get an SCC port on an MPC8270 working with Linux. I'm
> not overly familiar with the CPM and am having a bit of trouble.
>
> Linux is booting natively on the 8270. I have access to the 8270 via a
> set of PCI windows from a second core (includes one setup over the main
> memory and one over the IMMR) and SMC1 is up and working with a console.
>
> The SCCs seem to be detected correctly at boot:
>
> f011a80.serial: ttyCPM0 at MMIO 0xc3014a80 (irq = 16) is a CPM UART
> f011a00.serial: ttyCPM1 at MMIO 0xc3018a00 (irq = 40) is a CPM UART
> f011a20.serial: ttyCPM2 at MMIO 0xc3020a20 (irq = 41) is a CPM UART
> f011a40.serial: ttyCPM3 at MMIO 0xc3028a40 (irq = 42) is a CPM UART
>
> With the DTS reading:
>
> smc1: ser...@11a80 {
> device_type = "serial";
> compatible = "fsl,mpc8270-smc-uart",
> "fsl,cpm2-smc-uart";
> reg = <0x11a80 0x20 0x87fc 2>;
> interrupts = <4 8>;
> interrupt-parent = <&PIC>;
> fsl,cpm-brg = <7>;
> fsl,cpm-command = <0x1d000000>;
> };
>
> scc1: ser...@11a00 {
> device_type = "serial";
> compatible = "fsl,mpc8270-scc-uart",
> "fsl,cpm2-scc-uart";
> reg = <0x11a00 0x20 0x8000 0x100>;
> interrupts = <40 8>;
> interrupt-parent = <&PIC>;
> fsl,cpm-brg = <3>;
> fsl,cpm-command = <0x800000>;
> };
>
> scc2: ser...@11a20 {
> device_type = "serial";
> compatible = "fsl,mpc8270-scc-uart",
> "fsl,cpm2-scc-uart";
> reg = <0x11a20 0x20 0x8100 0x100>;
> interrupts = <41 8>;
> interrupt-parent = <&PIC>;
> fsl,cpm-brg = <6>;
> fsl,cpm-command = <0x4a00000>;
> };
>
> scc3: ser...@11a40 {
> device_type = "serial";
> compatible = "fsl,mpc8270-scc-uart",
> "fsl,cpm2-scc-uart";
> reg = <0x11a40 0x20 0x8200 0x100>;
> interrupts = <42 8>;
> interrupt-parent = <&PIC>;
> fsl,cpm-brg = <1>;
> fsl,cpm-command = <0x8c00000>;
> };
>
> I believe that I have the pins setup correctly and the BRGs connected
> correctly in the setup_arch function.
>
> At the moment I have SCC3 wired out. If I attempt to echo data out of
> the SCC (echo "Hello" > /dev/ttyCPM3) I get the prompt sits waiting.
> Rebooting and turning on the debug yields the following output on the
> console (but nothing out of the SCC port):
>
> CPM uart[3]:startup
> Interrupt attached
> CPM uart[3]:set_termios
> CPM uart[3]:start tx
> CPM uart[3]:stop tx
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:stop rx
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:shutdown
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> CPM uart[3]:tx_empty: 0
> ...
>
>
> It seemed to be waiting for ready bit of the Transmit Buffer Descriptor
> to be cleared (which it never seems to be), prodding this bit through
> the pci window did cause the process to continue, no data out but I did
> get back to the prompt on the console.
>
> I'm sure I'm just missing something really basic - can anyone enlighten me?
>
> Martyn
>
> --
> Martyn Welch (Principal Software Engineer) | Registered in England and
> GE Intelligent Platforms | Wales (3828642) at 100
> T +44(0)127322748 | Barbirolli Square,
> Manchester,
> E martyn.we...@ge.com | M2 3AB VAT:GB 927559189
>
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