On 06/01/2010 08:43 AM, Martyn Welch wrote:
diff --git a/arch/powerpc/kernel/head_32.S
b/arch/powerpc/kernel/head_32.S
index e025e89..861cace 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -1194,12 +1194,13 @@ setup_disp_bat:
#endif /* CONFIG_BOOTX_TEXT */
#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
+#define PPC_EARLY_DEBUG_CPM_ADDR
ASM_CONST(CONFIG_PPC_EARLY_DEBUG_CPM_ADDR)
setup_cpm_bat:
- lis r8, 0xf000
+ lis r8, ppc_early_debug_cpm_a...@ha
ori r8, r8, 0x002a
mtspr SPRN_DBAT1L, r8
- lis r11, 0xf000
+ lis r11, ppc_early_debug_cpm_a...@ha
ori r11, r11, (BL_1M<< 2) | 2
mtspr SPRN_DBAT1U, r11
Only the physical address should depend on where IMMR is. We should
use fixmap instead of an arbitrary address for the effective address.
There's a existing FIX_EARLY_DEBUG_BASE, but it's only 128 KiB so
we'll have to either grow it, or map only a subset of IMMR.
I think that's a more fundamental change to CPM early debug than I can
handle right now.
Is IMMRBASE on your board at some address that has a low likelihood of
conflicting when treated as a kernel effective address?
Plus, CONFIG_PPC_EARLY_DEBUG_CPM_ADDR points to the TX descriptor, not
to the beginning of IMMR, so you should mask off the lower 20 bits
(the offset is probably less than 64K, and the BAT might just ignore
the extra bits anyway, but why take chances?).
I assume that an extra instruction "andi r8, r8, 0xfff0" after each
"lis" instruction would be what you are looking for?
"andis" even.
"lis r8, (PPC_EARLY_DEBUG_CPM_ADDR & 0xfff00000)@h" should work too.
-Scott
_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
