On May 21, 2010, at 9:16 AM, Haiying Wang wrote: > P1021 is a dual e500v2 core based SOC with: > * 3 eTSECs (eTSEC1/3 RGMII, eTSEC2 SGMII on this board) > * 2 PCIe Controller > * 1 USB2.0 controller > * eSDHC, eSPI, I2C, DUART > * eLBC (NAND, BCSR, PMC0/1) > * Security Engine (SEC 3.3.2) > * Quicc Engine (QE) > > Signed-off-by: Haiying Wang <haiying.w...@freescale.com> > Signed-off-by: Yu Liu <yu....@freescale.com> > --- > v2: address the comments from Kumar. > arch/powerpc/boot/dts/p1021mds.dts | 698 +++++++++++++++++++++++++++++ > arch/powerpc/platforms/85xx/mpc85xx_mds.c | 102 ++++- > 2 files changed, 797 insertions(+), 3 deletions(-) > create mode 100644 arch/powerpc/boot/dts/p1021mds.dts
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