Eric,
1. I did try building with MDS configuration.
2. Removed BCSR section
3. Set u-boot environment variable.
The code boots up in the MPC8349 reference platform and not in the custom
board.
Also I am wondering why the cuImage would not give out any serial output
even, whereas I do see serial out with DTB file passed from u-boot?!!
Screen-shot:
==========
Bytes transferred = 12288 (3000 hex)
SC3000> bootm 0x2000000 - 0x3000000
## Booting image at 02000000 ...
Image Name: Linux-2.6.27.18
Created: 2009-12-09 21:57:32 UTC
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size: 1464261 Bytes = 1.4 MB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
## Current stack ends at 0x0FF9BD48 => set upper limit to 0x00800000
## cmdline at 0x007FFF00 ... 0x007FFF25
bd address = 0x0FF9BFC4
memstart = 0x00000000
memsize = 0x10000000
flashstart = 0xFE000000
flashsize = 0x00080000
flashoffset = 0x00034000
sramstart = 0x00000000
sramsize = 0x00000000
bootflags = 0x00000001
intfreq = 399.999 MHz
busfreq = 266.666 MHz
ethaddr = 00:E0:0C:00:8C:01
IP addr = 192.168.201.199
baudrate = 115200 bps
Skipping initrd
Booting using the fdt at 0x3000000
No initrd
## device tree at 0x03000000 ... 0x03002FFF (len=12288=0x3000)
Loading Device Tree to 007fc000, end 007fefff ... OK
Updating property '/soc8...@e0000000/ether...@24000/mac-address' = 00 e0 0c
00 81Updating property '/soc8...@e0000000/ether...@24000/local-mac-address'
= 00 e0 01Updating property 'timebase-frequency' = 03 f9 40 aa
Updating property 'bus-frequency' = 0f e5 02 a8
Updating property 'clock-frequency' = 17 d7 83 fc
Updating property 'bus-frequency' = 0f e5 02 a8
Updating property 'clock-frequency' = 0f e5 02 a8
## Transferring control to Linux (at address 00000000) ...
Using MPC834x MDS machine description
Linux version 2.6.27.18 (r...@localhost.localdomain) (gcc version 4.1.2) #4
Wed D9Found legacy serial port 0 for /soc8...@e0000000/ser...@4500
mem=e0004500, taddr=e0004500, irq=0, clk=266666664, speed=0
Found legacy serial port 1 for /soc8...@e0000000/ser...@4600
mem=e0004600, taddr=e0004600, irq=0, clk=266666664, speed=0
console [udbg0] enabled
setup_arch: bootmem
mpc834x_mds_setup_arch()
Found MPC83xx PCI host bridge at 0x00000000e0008500. Firmware bus number:
0->0
PCI host bridge /p...@e0008500 (primary) ranges:
MEM 0x0000000090000000..0x000000009fffffff -> 0x0000000090000000
MEM 0x0000000080000000..0x000000008fffffff -> 0x0000000080000000 Prefetch
IO 0x00000000e2000000..0x00000000e20fffff -> 0x0000000000000000
Found MPC83xx PCI host bridge at 0x00000000e0008600. Firmware bus number:
0->0
PCI host bridge /p...@e0008600 ranges:
MEM 0x00000000b0000000..0x00000000bfffffff -> 0x00000000b0000000
MEM 0x00000000a0000000..0x00000000afffffff -> 0x00000000a0000000 Prefetch
IO 0x00000000e2100000..0x00000000e21fffff -> 0x0000000000000000
arch: exit
Top of RAM: 0x10000000, Total RAM: 0x10000000
Memory hole size: 0MB
Zone PFN ranges:
DMA 0x00000000 -> 0x00010000
Normal 0x00010000 -> 0x00010000
Movable zone start PFN for each node
early_node_map[1] active PFN ranges
0: 0x00000000 -> 0x00010000
On node 0 totalpages: 65536
free_area_init_node: node 0, pgdat c02ed470, node_mem_map c030f180
DMA zone: 65024 pages, LIFO batch:15
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024
Kernel command line: root=/dev/ram rw console=ttyS0,115200
IPIC (128 IRQ sources) at fddfa700
PID hash table entries: 1024 (order: 10, 4096 bytes)
time_init: decrementer frequency = 66.666666 MHz
time_init: processor frequency = 399.999996 MHz
clocksource: timebase mult[3c00001] shift[22] registered
clockevent: decrementer mult[1111] shift[16] cpu[0]
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
On 12/9/09, Lee, Eric <eric....@hp.com> wrote:
>
> two things; I had better luck with the mpc8349mds (? don’t remember exact
> file name) dts as opposed to the itx. I had to remove the bcsr section or
> else the kernel hung during initialization . also, your u-boot is not
> passing the correct kernel commandline:
>
>
>
> “Kernel command line: root=/dev/nfs rw nfsroot=192.168.200.230:/nfsroot/rootfs
> i0IPIC (128 IRQ sources) at fdffc700”
>
>
>
> you’re trying to run a ramdisk and with tty I expect:
>
>
>
> “root=/dev/ram rw console=ttyS0,115200 “
>
>
>
> check your environment variable bootargs in u-boot
>
>
>
>
>
>
>
> *From:* Junita Ajith [mailto:ajij...@gmail.com]
> *Sent:* Wednesday, December 09, 2009 10:58 AM
> *To:* Lee, Eric
> *Cc:* Linuxppc-dev@lists.ozlabs.org
> *Subject:* dts file for MPC8343EA - cuImage doesn't boot , but uImage with
> DTS shows serial output
>
>
>
> Hi Eric,
>
> I am building the linux kernel V-2.6.27 based on MPC8349miTXGP dts file.
> I am still not able to boot the cuImage.
>
> But, I see serial outuput from kernel when I try to boot with <kernel>
> <ramdisk> <dtb file>
>
> Still the kernel hangs after "Dentry cache hash table entries: 32768
> (order: 5, 131072 bytes)".
>
> Any clues ..?? We have DDR2 in this board and we are initializing it in
> U-Boot.
>
> Please find the screen dump below:
>
> Thanks,
> Junita
>
> Screen shot:
> ===========
> u-boot> bootm 0x2000000 0x3000000 0x4000000
> ## Booting image at 02000000 ...
> Image Name: Linux-2.6.27.18-svn52-dirty8
> Created: 2009-12-08 23:49:28 UTC
> Image Type: PowerPC Linux Kernel Image (gzip compressed)
> Data Size: 1416039 Bytes = 1.4 MB
> Load Address: 00000000
> Entry Point: 00000000
> Verifying Checksum ... OK
> Uncompressing Kernel Image ... OK
> ## Current stack ends at 0x0FF9BD48 => set upper limit to 0x00800000
> ## cmdline at 0x007FFF00 ... 0x007FFFA6
> bd address = 0x0FF9BFC4
> memstart = 0x00000000
> memsize = 0x10000000
> flashstart = 0xFE000000
> flashsize = 0x00080000
> flashoffset = 0x00034000
> sramstart = 0x00000000
> sramsize = 0x00000000
> bootflags = 0x00000001
> intfreq = 399.999 MHz
> busfreq = 266.666 MHz
> ethaddr = 00:E0:0C:00:8C:01
> IP addr = 192.168.201.199
> baudrate = 115200 bps
> Not skipping initrd
> ## Loading RAMDisk Image at 03000000 ...
> Image Name: uboot ext2 ramdisk rootfs
> Created: 2009-10-30 20:15:22 UTC
> Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
> Data Size: 3889103 Bytes = 3.7 MB
> Load Address: 00000000
> Entry Point: 00000000
> Verifying Checksum ... OK
> Booting using the fdt at 0x4000000
> ## initrd at 0x03000040 ... 0x033B580E (len=3889103=0x3B57CF)
> Loading Ramdisk to 0fbe5000, end 0ff9a7cf ... OK
> ## device tree at 0x04000000 ... 0x04002FFF (len=12288=0x3000)
> Loading Device Tree to 007fc000, end 007fefff ... OK
> Updating property '/soc8...@e0000000/ether...@24000/mac-address' = 00 e0
> 0c 001Updating property '/soc8...@e0000000/ether...@24000/local-mac-address'
> = 00 e01Updating property 'timebase-frequency' = 03 f9 40 aa
> Updating property 'bus-frequency' = 0f e5 02 a8
> Updating property 'clock-frequency' = 17 d7 83 fc
> Updating property 'bus-frequency' = 0f e5 02 a8
> Updating property 'clock-frequency' = 0f e5 02 a8
> ## Transferring control to Linux (at address 00000000) ...
> Using MPC834x ITX machine description
> Linux version 2.6.27.18-svn52-dirty8 (r...@localhost.localdomain) (gcc
> version 9Found initrd at 0xcfbe5000:0xcff9a7cf
> console [udbg0] enabled
> setup_arch: bootmem
> mpc834x_itx_setup_arch()
> arch: exit
> Zone PFN ranges:
> DMA 0x00000000 -> 0x00010000
> Normal 0x00010000 -> 0x00010000
> Movable zone start PFN for each node
> early_node_map[1] active PFN ranges
> 0: 0x00000000 -> 0x00010000
> Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024
> Kernel command line: root=/dev/nfs rw nfsroot=192.168.200.230:/nfsroot/rootfs
> i0IPIC (128 IRQ sources) at fdffc700
> PID hash table entries: 1024 (order: 10, 4096 bytes)
> clocksource: timebase mult[3c00001] shift[22] registered
> Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
>
>
>
>
> On 12/9/09, *Lee, Eric* <eric....@hp.com> wrote:
>
> I would probably remove the bcsr region. this was some cpld I believe on a
> reference board. with this dts it'll try to write to some hardware
> registers that do not exist or are not mapped to the same area.
>
>
>
>
> -----Original Message-----
> From: linuxppc-dev-bounces+eric.lee=hp....@lists.ozlabs.org [mailto:
> linuxppc-dev-bounces+eric.lee <linuxppc-dev-bounces%2Beric.lee>=hp.com@
> lists.ozlabs.org] On Behalf Of ajij...@gmail.com
> Sent: Sunday, December 06, 2009 11:41 PM
> To: Linuxppc-dev@lists.ozlabs.org
> Subject: dts file for MPC8343EA
>
> Hi
>
> We have an MPC8343EA based custom board.
>
> I am not able to get Linux up and running in this. No serial output to
> debug further.
> U-boot shows correct 'bdinfo' & 'clocks' output.
> inux hangs at machine_probe.
>
>
> I doubt the DTS file in Linux. anyone has DTS file for MPC8343??
>
> u-boot version - 1.3.2
> linux-2.6.27
> The board base files are drived from MPC8349Imtx-GP since we have the
> reference board in which we tested the linux image.
>
> My current DTS file
> /dts-v1/;
>
> / {
> model = "MPC8343";
> compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
> linux,phandle = <0x100>;
> #size-cells = <0x1>;
> #address-cells = <0x1>;
>
> aliases {
> ethernet0 = &enet0;
> ethernet1 = &enet1;
> serial0 = &serial0;
> serial1 = &serial1;
> pci0 = &pci0;
> pci1 = &pci1;
> };
> cpus {
> linux,phandle = <0x200>;
> #cpus = <0x1>;
> #address-cells = <1>;
> #size-cells = <0>;
>
> PowerPC,834...@0 {
> device_type = "cpu";
> reg = <0x0>;
> d-cache-line-size = <20>;
> i-cache-line-size = <20>;
> d-cache-size = <8000>;
> i-cache-size = <8000>;
> timebase-frequency = <0>; // from bootloader
> bus-frequency = <0>; // from bootloader
> clock-frequency = <0>; // from bootloader
> 32-bit;
> };
> };
>
>
> memory {
> device_type = "memory";
> reg = <0x00000000 0x10000000>; // 256MB at 0
> };
>
> b...@e2400000 {
> device_type = "board-control";
> reg = <0xe2400000 0x8000>;
> };
> soc8...@e0000000 {
> bus-frequency = <0x1>;
> reg = <0xe0000000 0x200>;
> ranges = <0x0 0xe0000000 0x100000>;
> device_type = "soc";
> #interrupt-cells = <0x2>;
> #size-cells = <0x1>;
> #address-cells = <0x1>;
>
> w...@200 {
> device_type = "watchdog";
> compatible = "mpc83xx_wdt";
> reg = <0x200 0x100>;
> };
>
> i...@3000 {
> #address-cells = <1>;
> #size-cells = <0>;
> cell-index = <0>;
> compatible = "fsl-i2c";
> reg = <0x3000 0x100>;
> interrupts = <14 0x8>;
> interrupt-parent = <&ipic>;
> dfsrr;
>
> r...@68 {
> compatible = "dallas,ds1374";
> reg = <0x68>;
> };
> };
>
> i...@3100 {
> #address-cells = <1>;
> #size-cells = <0>;
> cell-index = <1>;
> compatible = "fsl-i2c";
> reg = <0x3100 0x100>;
> interrupts = <15 0x8>;
> interrupt-parent = <&ipic>;
> dfsrr;
> };
>
> s...@7000 {
> cell-index = <0>;
> compatible = "fsl,spi";
> reg = <0x7000 0x1000>;
> interrupts = <16 0x8>;
> interrupt-parent = <&ipic>;
> mode = "cpu";
> };
>
> d...@82a8 {
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
> reg = <0x82a8 4>;
> ranges = <0 0x8100 0x1a8>;
> interrupt-parent = <&ipic>;
> interrupts = <71 8>;
> cell-index = <0>;
> dma-chan...@0 {
> compatible = "fsl,mpc8349-dma-channel",
> "fsl,elo-dma-channel";
> reg = <0 0x80>;
> interrupt-parent = <&ipic>;
> interrupts = <71 8>;
> };
> dma-chan...@80 {
> compatible = "fsl,mpc8349-dma-channel",
> "fsl,elo-dma-channel";
> reg = <0x80 0x80>;
> interrupt-parent = <&ipic>;
> interrupts = <71 8>;
> };
> dma-chan...@100 {
> compatible = "fsl,mpc8349-dma-channel",
> "fsl,elo-dma-channel";
> reg = <0x100 0x80>;
> interrupt-parent = <&ipic>;
> interrupts = <71 8>;
> };
> dma-chan...@180 {
> compatible = "fsl,mpc8349-dma-channel",
> "fsl,elo-dma-channel";
> reg = <0x180 0x28>;
> interrupt-parent = <&ipic>;
> interrupts = <71 8>;
> };
> };
> /* phy type (ULPI or SERIAL) are only types supported for MPH */
> /* port = 0 or 1 */
> u...@22000 {
> compatible = "fsl-usb2-mph";
> reg = <0x22000 0x1000>;
> #address-cells = <1>;
> #size-cells = <0>;
> interrupt-parent = <&ipic>;
> interrupts = <39 0x8>;
> phy_type = "ulpi";
> port1;
> };
> /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
> u...@23000 {
> compatible = "fsl-usb2-dr";
> reg = <0x23000 0x1000>;
> #address-cells = <1>;
> #size-cells = <0>;
> interrupt-parent = <&ipic>;
> interrupts = <38 0x8>;
> dr_mode = "otg";
> phy_type = "ulpi";
> };
>
> m...@24520 {
> #address-cells = <1>;
> #size-cells = <0>;
> compatible = "fsl,gianfar-mdio";
> reg = <0x24520 0x20>;
>
> phy0: ethernet-...@0 {
> interrupt-parent = <&ipic>;
> interrupts = <17 0x8>;
> reg = <0x0>;
> device_type = "ethernet-phy";
> };
> phy1: ethernet-...@1 {
> interrupt-parent = <&ipic>;
> interrupts = <18 0x8>;
> reg = <0x1>;
> device_type = "ethernet-phy";
> };
> enet0: ether...@24000 {
> cell-index = <0>;
> device_type = "network";
> model = "TSEC";
> compatible = "gianfar";
> reg = <0x24000 0x1000>;
> local-mac-address = [ 00 00 00 00 00 00 ];
> interrupts = <32 0x8 33 0x8 34 0x8>;
> interrupt-parent = <&ipic>;
> phy-handle = <&phy0>;
> linux,network-index = <0>;
> };
>
> enet1: ether...@25000 {
> cell-index = <1>;
> device_type = "network";
> model = "TSEC";
> compatible = "gianfar";
> reg = <0x25000 0x1000>;
> local-mac-address = [ 00 00 00 00 00 00 ];
> interrupts = <35 0x8 36 0x8 37 0x8>;
> interrupt-parent = <&ipic>;
> phy-handle = <&phy1>;
> linux,network-index = <1>;
> };
>
> serial0: ser...@4500 {
> cell-index = <0>;
> device_type = "serial";
> compatible = "ns16550";
> reg = <0x4500 0x100>;
> clock-frequency = <0>;
> interrupts = <9 0x8>;
> interrupt-parent = <&ipic>;
> };
>
> serial1: ser...@4600 {
> cell-index = <1>;
> device_type = "serial";
> compatible = "ns16550";
> reg = <0x4600 0x100>;
> clock-frequency = <0>;
> interrupts = <10 0x8>;
> interrupt-parent = <&ipic>;
> };
>
> cry...@30000 {
> compatible = "fsl,sec2.0";
> reg = <0x30000 0x10000>;
> interrupts = <11 0x8>;
> interrupt-parent = <&ipic>;
> fsl,num-channels = <4>;
> fsl,channel-fifo-len = <24>;
> fsl,exec-units-mask = <0x7e>;
> fsl,descriptor-types-mask = <0x01010ebf>;
> };
>
> Thanks,
> agnel
>
> _______________________________________________
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> Linuxppc-dev@lists.ozlabs.org
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>
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