Hi Peter, On Fri, Dec 04, 2009 at 01:43:40PM -0600, Peter Tyser wrote: > This change resolves 2 issues: > - Different chips have a different number of GPIO pins per controller. > For example, the MPC8347 has 32, the P2020 16, and the mpc8572 8. > Previously, the mpc8xxx_gpio driver assumed every chip had 32 GPIO > pins which resulted in some processors reporting an incorrect 'ngpio' > field in /sys. Additionally, users could export and "use" 32 GPIO > pins, although in reality only a subset of the 32 pins had any real > functionality. > > - Some boards don't utilize all available GPIO pins. Previously, > unused GPIO pins could still be exported and "used", even though the > pins had no real functionality. This is somewhat confusing to a user > and also allow a user to do something "bad", like change an unused > floating output into a floating input.
There are hundreds of other ways to screw things up. Think of /dev/mem, you still able to change the registers. Before changing any GPIO (whether it is a normal or reserved GPIO), user has to consult with schematics/docs. > Adding a new "fsl,gpio-mask" device tree property allows a dts file to > accurately describe what GPIO pins are available for use on a given > board. I don't see any real usage for this. If device tree specifies a wrong gpio in the gpios = <> property, then it's a bug in the device tree and should be fixed (or workarounded in the platform code). If a user fiddles with unknown gpios via sysfs interface, then it's user's problem. FWIW, we don't have any masks for reserved IRQs. Thanks, -- Anton Vorontsov email: cbouatmai...@gmail.com irc://irc.freenode.net/bd2 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
