On Tue, Dec 1, 2009 at 10:35 PM, Segher Boessenkool <seg...@kernel.crashing.org> wrote: >> The scenario for the first case is that in a multicore system running >> ASMP which means different OS runs on different cores. They might >> communicate through a shared memory region. The region on every OS >> need to be mapped with the same cache perperty to avoid cache paradox. > > This isn't true. In ASMP, you cannot usually do coherency between > the different CPUs at all. Also, in most PowerPC implementations,
Coherency can't be achieved with proper configuration and management? Why so? > it is fine if one CPU maps a memory range as coherent while another > maps it as non-coherent; sure, you have to be careful or you will But we do want the shared region to be coherent. So mappings should have the same cacheability property. > read stale data, but things won't wedge. > >> The scenario for the second case is to pre-allocate some memory to a >> certain application or device (probably through mem=XXX kernel >> parameter or limit through device tree). The memory is not known to >> kernel, but fully managed by the application/device. We need being >> able to map the region cachable for better performance. > > So make the memory known to the kernel, just tell the kernel not to > use it. If it's normal system RAM, just put it in the "memory" node > and do a memreserve on it (or do something in your platform code); if > it's some other memory, do a device driver for it, map it there. Your solution is feasible. But the memory allocation is a software configuration. IMHO, it should be better and easier addressed by changing configurations(like mem parameter) rather than the kernel platform code which should address hardware configuration. - Leo _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev