On Jul 26, 2009, at 10:34 AM, wilbur.chan wrote:
e500 , in head_fsl_booke.S
We know,the first two steps are:
1) invalidate all entries except the entry we are in
2) setup a temp mapping and jump to it respectively:
tlbwe
bl 1f
1: mflr r9
rlwimi r7,r9,0,20,31
addi r7, r7,24
mtspr SPRN_SRR0,r7
mtspr SPRN_SRR1,r6
rfi
/* jump to 0-4k .
question1: Why not this 'rfi' did not caused jumping into
4k-8k , or 10k-14k , etc ? */
I'm not sure what version of this code you are referencing but it sets
up a mapping in the alternate address space and jumps to the same EPN.
li r6,0
question2: We know that, it is not allowed the two entrys having the
same EPN value,so, when setting up a temp entry which ranged from
0-4k, is it possible that , this
range(0-4k) may conflit with the entry we are executed in now?
Its not allowed for two entries to have the same VA (or conflicting
VAs) its perfectly find to have the same EPN. We use the address
space bit of the VA to ensure we don't conflict.
- k
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