This patch enables the XMC (PCIe daughter card) site on the SBC310.
STG enter the description for the patch above.

Signed-off-by: Martyn Welch <martyn.we...@gefanuc.com>
---

 arch/powerpc/boot/dts/gef_sbc310.dts |   37 ++++++++++++++++++++++++++++++++++
 1 files changed, 37 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts 
b/arch/powerpc/boot/dts/gef_sbc310.dts
index 0f4c9ec..7810ea9 100644
--- a/arch/powerpc/boot/dts/gef_sbc310.dts
+++ b/arch/powerpc/boot/dts/gef_sbc310.dts
@@ -376,4 +376,41 @@
                                  0x0 0x00400000>;
                };
        };
+
+       pci1: p...@fef09000 {
+               compatible = "fsl,mpc8641-pcie";
+               device_type = "pci";
+               #interrupt-cells = <1>;
+               #size-cells = <2>;
+               #address-cells = <3>;
+               reg = <0xfef09000 0x1000>;
+               bus-range = <0x0 0xff>;
+               ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
+                         0x01000000 0x0 0x00000000 0xfe400000 0x0 0x00400000>;
+               clock-frequency = <33333333>;
+               interrupt-parent = <&mpic>;
+               interrupts = <0x19 0x2>;
+               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+               interrupt-map = <
+                       0x0000 0x0 0x0 0x1 &mpic 0x4 0x2
+                       0x0000 0x0 0x0 0x2 &mpic 0x5 0x2
+                       0x0000 0x0 0x0 0x3 &mpic 0x6 0x2
+                       0x0000 0x0 0x0 0x4 &mpic 0x7 0x2
+                       >;
+
+               p...@0 {
+                       reg = <0 0 0 0 0>;
+                       #size-cells = <2>;
+                       #address-cells = <3>;
+                       device_type = "pci";
+                       ranges = <0x02000000 0x0 0xc0000000
+                                 0x02000000 0x0 0xc0000000
+                                 0x0 0x20000000
+
+                                 0x01000000 0x0 0x00000000
+                                 0x01000000 0x0 0x00000000
+                                 0x0 0x00400000>;
+               };
+       };
+
 };
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