[ed: quoting repaired] On Wed, May 20, 2009 at 11:26 AM, Eric Millbrandt <emillbra...@dekaresearch.com> wrote: > Grant Likely wrote: > > Yes, that sounds familiar. Most likely, the value of the MDIO bus > > control register got clobbered and not reset when the FEC was reset. > > Try adding this line to the beginning of mpc52xx_fec_mdio_transfer(): > > > > out_be32(&fec->mii_speed, 0x7e); > > > > It's a dirty ugly hack, but it should help. If that works, then I can > > come up with a better solution. Part of the problem is that the MDIO > > handling in the current code really isn't very good. I've got changes > > queued up in -next which cleans it up quite a bit which should make it > > easier to fix properly. > > That worked! I'm still getting the fifo receive errors, but at least now the > fec recovers.
Okay, I'll see if I can work that into a cleaner patch. In fact, I should look into reworking it so that the PHY doesn't get reset on a FIFO error. It shouldn't need to be reset at all AFAIKT. That way even when FIFO errors occur, they should not cause an expensive renegotiate time. g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
