On Tue, Apr 14, 2009 at 3:23 PM, David Hawkins <d...@ovro.caltech.edu> wrote: > I'll let Ira update you on the patch status. > > If you want someone to chat about the hardware-level interaction, > feel free to chat off-list - assuming of course that no one wants > to hear us talk hardware :) > > I selected the MPC8349EA in-part due to its PCI mailboxes, so > that we could implement this type of driver (an interlocked > handshake for flow control of data transfers). The previous > chip I'd used was a PLX PCI9054 Master/Target, and it has > similar registers. > > I'm not sure if the Xilinx PCI core, or whatever PCI core you > are using, already has something like the mailboxes implemented, > but if not, it won't take much to code up some logic. > I prefer VHDL myself, but can speak Verilog if forced to :)
Thanks David. I haven't looked closely at the xilinx pci data sheet yet, but I don't expect too many issues in this area. As you say, it won't take much to code it up. I'll be poking my VHDL engineer to make it do what I want it to. :-) I'll keep you up to date on my progress. g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
