On Tue, 2009-04-07 at 01:13 -0500, Kumar Gala wrote: > During the ISA 2.06 development the opcode for tlbilx changed and some > early implementations used to old opcode. Add support for a MMU_FTR > fixup to deal with this. > > Signed-off-by: Kumar Gala <ga...@kernel.crashing.org> > --- > arch/powerpc/include/asm/mmu.h | 6 ++++++ > arch/powerpc/include/asm/ppc-opcode.h | 11 ++++++++++- > arch/powerpc/kernel/cputable.c | 2 +- > arch/powerpc/mm/tlb_nohash_low.S | 14 +++++++++++++- > 4 files changed, 30 insertions(+), 3 deletions(-) > > diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h > index cbf1543..86d2366 100644 > --- a/arch/powerpc/include/asm/mmu.h > +++ b/arch/powerpc/include/asm/mmu.h > @@ -52,6 +52,12 @@ > */ > #define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000) > > +/* This indicates that the processor uses the wrong opcode for tlbilx > + * instructions. During the ISA 2.06 development the opcode for tlbilx > + * changed and some early implementations used to old opcode > + */ > +#define MMU_FTR_TLBILX_EARLY_OPCODE ASM_CONST(0x00400000)
You're actually going to ship those parts? :) It seems a pity to use up a feature bit. cheers -- Michael Ellerman OzLabs, IBM Australia Development Lab wwweb: http://michael.ellerman.id.au phone: +61 2 6212 1183 (tie line 70 21183) We do not inherit the earth from our ancestors, we borrow it from our children. - S.M.A.R.T Person
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